AM3352: DDR3 configuration at high temp

Tsurumoto

Genius 15414 points

Part Number: AM3352

I have a question related to

We are planning to use at 85℃.

To increase the refresh rale at high temp, we believe that ASR or SRT should be enabled.

Therefore, we would like to confirm if we can enable it appropriately.

> Setting either bit will trigger an initialization, which would only be noticeable if you probe the DDR signals.

I understand that we can see if we can enable it appropriately by monitoring the DDR signals.

Which signal should be observed at what timing?

In addition to set ASR or SRT, is there any points which we have to take care to use the device at high temp environment?

Thanks and Best regards,

HaTa

over 4 years ago

0 JJD over 4 years ago

TI__Guru* 87240 points

HaTa, the DDR3 hardware initialization sequence is list in section 7.3.3.6.2. It would be difficult to probe because you would need to decode the full command sequence to the memory.

I'm not sure which software you are using, but as long as you set the SDRAM_REF_CTRL register with the ASR or SRT bit set as you want, then during the DDR initialization early on in the bootloader, the SDRAM programming should work. Don't write SDRAM_REF_CTRL at any other time in code I would ensure the final write to SDRAM_REF_CTRL occurs immediately after SDRAM_CONFIG, as shown in this excerpt from u-boot:

writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
	writel(regs->sdram_config, &cstat->secure_emif_sdram_config);

	/* Wait 1ms because of L3 timeout error */
	udelay(1000);

	writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
	writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);


You will need to check the DDR datasheet for the things you need to take care of during high temperature operation.  The refresh rate will need to be doubled at high temperature (3.9us), and some timing values may need to be derated.
Regards,
James

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AM3352: DDR3 configuration at high temp