TMDSIDK437X: How to assert MII_RT MAC signal TX_EN?

hi,

  am working on a demo of PRUSS1 MII_RT to send packet from PRU0 through mii0 port, I can push data into TX FIFO, but can't transmmit data out to phy. I've checked the signal of mii and found that the signal TX_EN is always low, and I think that's why the data remains in FIFO.

  So I want to know the steps to assert TX_EN.

  I've found the notes in TRM:

There are four dependencies that must be true for TX_EN to assert.
1. TX L1 FIFO not empty
2. Interpacket gap (IPG) timer expiration
3. RX_DV to TX_EN timer expiration
4. TX_EN compare timer expiration

  But I don't understand what's the TX_EN timer? and is there any way to check wether the 3 mentioned timers expiried or not?

 Here is my demo code

#include <stdint.h>
#include <pru_cfg.h>
#include <pru_ctrl.h>
#include "pru_mii_rt.h"


#define PKT_SIZE    70

volatile register uint32_t __R30;
volatile register uint32_t __R31;


uint8_t buffer[PKT_SIZE] = {
        0xf0, 0xde, 0xf1, 0x9f, 0xbb, 0x91,
        0x2c, 0x6b, 0x7d, 0xb3, 0xf8, 0x56,
        0x08, 0x00, 0x01, 0x02, 0x03, 0x04,
        0x05, 0x06, 0x07, 0x08, 0x09, 0x0a,
        0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10,
        0x11, 0x12, 0x13, 0x14, 0x15, 0x16,
        0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c,
        0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22,
        0x23, 0x24, 0x25, 0x26, 0x27, 0x28,
        0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e,
        0x2f, 0x30, 0x31, 0x32, 0x33, 0x34,
        0x35, 0x36, 0x37, 0x38
};


void mii_rt_init(void)
{
    CT_CFG.GPCFG0_bit.PRU0_GPI_MODE = 0x3;//mii_rt mode
    CT_CFG.SPP_bit.XFR_SHIFT_EN = 0x1;//enable

    MII_RT.RXCFG0_bit.RX_CUT_PREAMBLE = 0x1;
    MII_RT.RXCFG0_bit.RX_ENABLE = 0x1;//enable mii0 rx


    MII_RT.TXCFG0_bit.TX_CLK_DELAY = 0x6;// to ensure IO timing
    MII_RT.TXCFG0_bit.TX_START_DELAY = 0x40;//delay 320ns after rx_dv active
    MII_RT.TXCFG0_bit.TX_MUX_SEL = 0;//set mii0 tx data from PRU0 (default PRU1)
    MII_RT.TXCFG0_bit.TX_AUTO_PREAMBLE = 0x1;//tx fifo provides preamble
    MII_RT.TXCFG0_bit.TX_ENABLE = 0x1;//enable mii0 tx
}

void test_tx_push_fifo()
{
    uint8_t i;
    for(i=0; i<PKT_SIZE; i++){
        __R30 = buffer[i];
        __R30 |= (uint32_t)(0xff<<16);
        __R31 |= (1<<24);
    }
}

/**
 * main.c
 */
int main(void)
{
    mii_rt_init();

    __R31 |= (1<<30);//tx reset

    while(1){
        test_tx_push_fifo();
        __R31 |= (1<<29);//set TX EOF
        __delay_cycles(20000);
    }

	__halt();

    return 0;
}