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Frequent questions

  • [FAQ] AM62A7: How to Set the Minimum/Maximum Exposure Time and Analog Gain for 2A Algorithm?

    Part Number: AM62A7 I’ve just brought up a sensor for AM62A. Now I’m going to start image quality tuning. According to the AM6xA ISP Tuning Guide , the first thing is to set the minimum and maximum exposure time and analog gain for the 2A algorithm. …

  • [FAQ] J721S2XSOMXEVM: Enable USB 2.0 Hub on J7200/J721S2/J784S4

    Part Number: J721S2XSOMXEVM How to enabled the USB 2.0 hub stack present on the common processor board with J7200/J721S2/J784S4 SOM.

  • [FAQ] TDA4VM: How to boot using initramfs

    Part Number: TDA4VM The default SDK uses full fledged file system on the SD card rootfs partition as file system. How to boot using initramfs?

  • [FAQ] AM623: Package ALW contact pressure specification for thermopad

    In customer's current AM6232 design they have to use a heat sink on top of MPU. A “ThermoPad” is then used between the heat sink and AM6232. In order for this to work correctly, a certain amount of contact pressure is required. I don't think there…

  • [FAQ] AM623: Package ALW contact pressure specification for thermopad

    Part Number: AM623 Hi champs! In customer's current AM6232 design they have to use a heat sink on top of MPU. A “ThermoPad” is then used between the heat sink and AM6232. In order for this to work correctly, a certain amount of contact pressure…

  • [FAQ] TDA4VM: Stream camera of 2 datatypes using 2 Capture nodes and 2 Graphs on the same csi-rx instance

    Part Number: TDA4VM How to Send a YUV input and a raw input from a sensor to the same CSI-RX instance at a time?

  • [FAQ] AM625 / AM623 / AM620-Q1 / AM625-Q1 / AM625SIP : Custom board hardware design – Processor power-sequencing requirements for power-up and power-down

    Other Parts Discussed in Thread: TPS65220 , AM6442 , SK-AM62B-P1 , AM625 , AM625-Q1 Hi TI Experts, I have the below queries regarding SOC(Processor) power-sequencing requirements for power-up and power-down 1.Is there a recommended power sequence…

  • [FAQ] DP83869-EP: Ethernet compliance Testing failure when interfaced to AM64x

    Part Number: DP83869-EP Other Parts Discussed in Thread: DP83869 Hi Team, I have a customer testing ethernet compliance 1G on the AM64x EVM. They have the same implementation on their custom board and seeing similar failures. There are some failures…

  • [FAQ] AM625 / AM623 / AM620-Q1 / AM625-Q1 / AM625SIP : Custom board hardware design – Power sequencing between SOC (Processor) and the Attached devices (Fail-safe)

    Other Parts Discussed in Thread: AM625 , AM625-Q1 , AM620-Q1 , AM62A3 , AM62A7 , AM625SIP , AM623 Hi TI Experts, I have the below queries regarding Power supply sequencing between SOC (Processor) and the Attached devices Can I power the SOC (Processor…

  • [FAQ] AM62A3-Q1: Which SPI NAND should use?

    Part Number: AM62A3-Q1 Other Parts Discussed in Thread: AM62A3 Hi Expert, For AM62A3 , Which SPI NAND should use ? OSPI or QSPI ? And what capacity do you suggest ? Is there a maximum or minimum limit on nand capacity? Thanks Daniel

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