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CCS/TMS320C6748: prsc module failed to write to a register

Part Number: TMS320C6748

Tool/software: Code Composer Studio

Good day,

We are  customized design using C6748.

we are facing (Error-6311) PRSC module failed to write  to a register.

(Emulation package 5.1.450.0)

Please find the attached Schematic diagram.

please do the needful how to resolve this issue.

we are waitingti_sschematic.pdf for the valuable reply.

thanks

EG.Rajendhran

  • Hi,

    I'll take a look at the schematic. For starters you can check this thread and the link inside it:
    e2e.ti.com/.../578783

    Best Regards,
    Yordan
  • Hi,

    I am unable to read the pdf. I zoomed the schematic to up to 400% and still the document is not readable.
    Could you generate the pdf again an send it? Maybe it was somehow damaged when you uploaded it.

    Best Regards,
    Yordan
  • Hi yordan.

    Good day,

    Sorry for the inconvenience.

    please find the attached the Schematic diagramti.rar.

    We are using code compressor studio 8.0.0, connection is Texas Instruments XDS100v3 USB Debug Probe and device is TMS320c6748.

    Initially we check the Test connection we getting the message '( The JTAG DR Integrity scan-test has succeeded)' .  i hope DSP Processor ( TMS320c6748 ) has detected.

    And then we are flashing the code  we getting error message" "Error-6311) PRSC module failed to wire to a register. (Emulation package 5.1.450.0)."

    we checked the power sequence 3.3v, 1.8v and 1.3v are fine.

    kindly give me the solution how to resolve this issue.

    please do the needful.

    we are waiting for your valuable reply.

    Thanks and Regards

    EG.Rajendhran

  • Good day,

    Waiting for your reply.

  • Hi,

    Again the pdf is not good to read (I cannot see resistor/capacitor values, some elements part numbers etc..), could you separate each page of the schematic as one page on the pdf (currently all schematic pages are generated in a single pdf page, which messes up with the quality of the document). I am only interested in the power supply circuitry.

    I was able to glance that you have test ponts on the power rails. Check for any voltage drops in the power supplies.

    Best Regards,
    Yordan
  • Also check this thread for pointers:
    e2e.ti.com/.../692580

    Best Regards,
    Yordan
  • hi, good day,

    Again sorry for the inconvenience.

    i hope this attached pdf is fine. 

    please do the needful.....

    Does the  freshly purchased DSP processor (TMS320c6748bzwt) default loaded with any basic configuration.

    please do the needful.....

    reference design.pdf

  • Yes, this is readable on my machine. I will take a look at it and update.

    Best Regards,
    Yordan
  • Hi,

    I am looking into your schematics.
    Did you perform the measurements of the power supplies for voltage drops as I asked?

    Best Regards,
    Yordan
  • Hi, good day,

    There is no voltage drop.

    Any other check points sir?

    Thanks...

  • The Schematic seems correct. Is it possible to try with another (external) emulator and see if the problem will persist?

    Best Regards,
    Yordan

  • Hi Yordan,

    Good day,

    Thanks for sharing the suggestion.


    Previously we are faced (Error-6311) PRSC module failed to write to a register. (Emulation package 5.1.450.0).

    Now it was rectified due to Crystal not properly placed.

    but now we are facing the following error

    " File loader: Verification failed: Values at address 0xC3032000 do not match please verify target memory and memory map.
    GEL: File: D:\ workspace_v8\UART_BasicExample_lcdkOMAPl138_c674xTestproject\Debug\UART_BasicExample_lcdkOMAPl138_c674xTestproject.out: a data verification error occurred, file load failed. "

    so, kindly give some check points to solve the issues and already we attached the schematic if u need please refer.

    If GEL file is problem kindly share proper GEL file.

    We checked the DDR supply voltage is 1.8V and Vref is 0.9V.

    Please do the needful.
  • Dear yordan,

    we forget say one more point.

    we Checked the DDR-2 IC

    DDR_CLKP pin low like 0V and DDR_CLKN pin check it high like 1.7V

    please do the needful.

    We are waiting for your valuable reply
  • Dear yorden,

    Good day,

    now we are able to get the clock signal (DDR_CLKP & DDR_CLKN).

    But still we have getting same error " File Loader: Verification failed: Values at address 0xC3032000 do not match Please verify target memory and memory map".

    We hope DDR initialization  is success.

    please do the needful.

    Thanks.....

  • Hi Raj,

    Check out this thread with similar issue and resolution: e2e.ti.com/.../444298

    What DDR device are you using, how are you initializing it (in the GEL)?, and can you access the memory range using CCS mem window after initializing the DDR memory?

    Regards,
    Mark
  • 8228.C6748_LCDK.gelHI mark,

    Good day,

    thanks for your prompt reply,

    We are using DDR device is Micron - W971GG6KB-25.

    Please find the attached gel file for your reference.

    This is customize board and first time we are flash the program.

    #include <stdio.h>


    /**
    * hello.c
    */
    int main(void)
    {
    printf("Hello World!\n");

    return 0;
    }

    we flash the above mentioned code we get the 

    C674X_0: Output: Target Connected.
    C674X_0: Output: ---------------------------------------------
    C674X_0: Output: Memory Map Cleared.
    C674X_0: Output: ---------------------------------------------
    C674X_0: Output: Memory Map Setup Complete.
    C674X_0: Output: ---------------------------------------------
    C674X_0: Output: PSC Enable Complete.
    C674X_0: Output: ---------------------------------------------
    C674X_0: Output: PLL0 init done for Core:300MHz, EMIFA:25MHz
    C674X_0: Output: DDR initialization is in progress....
    C674X_0: Output: PLL1 init done for DDR:150MHz
    C674X_0: Output: Using DDR2 settings
    C674X_0: Output: DDR2 init for 150 MHz is done
    C674X_0: Output: ----------------------------------

    We checked the DDR2MDDR0 Register value screen shot for your reference.

    But we flash the below mentioned the code we are getting the same error.

    C674X_0: File Loader: Verification failed: Values at address 0xC3032000 do not match Please verify target memory and memory map.
    C674X_0: GEL: File: C:\Users\ATS\workspace_v8\UART_BasicExample_lcdkOMAPL138_c674xTestProject\Debug\UART_BasicExample_lcdkOMAPL138_c674xTestProject.out: a data verification error occurred, file load failed.

     

    kindly suggest to check the DDR device is working properly.

    Kindly suggest the how to resolve this error.

    Please do the needful

    Thanks 

    Raj

    UART_BasicExample_lcdkOMAPL138_c674xTestProject.rar

  • Hi Mark

    Good day,

    We are waiting for your valuable reply.

    Thanks.....

  • Hi Raj,

    W971GG6KB-25 is the same DDR2 memory that is listed on the BOM of the LCDK EVM, so the same GEL should initialize your DDR memory also.

    Use CCS to connect to the target before trying to flash any boot image. The DSP has no FLASH memory, so you will use the Load Program feature of CCS to copy your CCS project .out file to the device memory (internal and external).

    Make sure your GEL matches this one...

    processors.wiki.ti.com/.../C6748_Development_Kit_(LCDK)

    Start with DDR2 frequency at 102MHz by clicking on Core_100MHz_mDDR_102MHz from the Scripts --> "Frequency Settings" drop down menu

    With the DDR initialized using this slowest frequency, use the CCS memory window to write and read from the DDR address space. Choose continuous refresh mode to see if the data read from the memory is stable after multiple reads.

    DDR2/mDDR Data lies between 0xC0000000 to 0xCFFFFFFF

    Then you can use a simple test to write patterns to the DDR memory and read back those patterns to make sure it matches what you wrote. Using the .CMD file, make sure that your program does not allocate anything in DDR space (except for the buffers used to write and read back data). You can also do this from the GEL file, but it will execute much slower.

    Let us know your results.

    Hope this helps,
    Mark