• State
  • Locked Locked
  • Replies 8 replies
  • Subscribers 99 subscribers
  • Views 585 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Original question:

Compiler/TDA4VM: How to load mcspi_slavemode APP from eMMC

Compiler/TDA4VM: How to load MCSPI_Slave_TestAPP from u-boot

leo ho
Intellectual 340 points
Part Number: TDA4VM


Tool/software: TI C/C++ Compiler

Hi TI members,

I want to load MCSPI_Slave_TestAPP APP from u-boot.

The same problem in this thread, but this time the problem is in 07_00 version.

I use the default setting and make the MCSPI_Slave_TestAPP and try to load it from u-boot, but there's no any output log at MCU UART.

I tried to modified the link file from this thread, but there have some error in making the app.

Is there any new patch can provide use?

Best Regard,
Leo Ho

  • 0
    Intellectual 340 points

    Hi TI members,

    Is there any update?

    Best Regard,
    Leo Ho

  • 0 in reply to leo ho
    TI__Guru* 78015 points

    Hi Leo Ho,

    Apologies for a delayed response on this thread.

    leo ho said:
    I tried to modified the link file from this thread, but there have some error in making the app.

    When you change the Linker file, what error do you see while building?

    Regards,

    Karan

  • 0 in reply to Karan Saxena
    Intellectual 340 points

    Hi Karan,

    There is the error log and the link file I modified below.

    Fullscreen make_mcspi_master_testapp_Log.txt Download 
    leo@leo-VirtualBox:~/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/build$ make MCSPI_Master_TestAppmake -C /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode -f makefile xdc_configuro
make[1]: Entering directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
make /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/configuro/linker_mod.cmd
make[2]: Entering directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
make[2]: '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/configuro/linker_mod.cmd' is up to date.
make[2]: Leaving directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
make[1]: Leaving directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
make -C /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode -f makefile
make[1]: Entering directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
make -f makefile osal_tirtos spi sciclient i2c csl board uart  
make[2]: Entering directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
make[2]: Nothing to be done for 'osal_tirtos'.
make[2]: Nothing to be done for 'spi'.
make[2]: Nothing to be done for 'sciclient'.
make[2]: Nothing to be done for 'i2c'.
make[2]: Nothing to be done for 'csl'.
make[2]: Nothing to be done for 'board'.
make[2]: Nothing to be done for 'uart'.
make[2]: Leaving directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
make -f makefile /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/bin/j721e_evm/MCSPI_Master_j721e_evm_mcu1_0TestApp_release.xer5f
make[2]: Entering directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
/bin/cp /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/configuro/package/cfg/*.rov.xs /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/bin/j721e_evm
# Linking into /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/bin/j721e_evm/MCSPI_Master_j721e_evm_mcu1_0TestApp_release.xer5f...
#
/bin/cp /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/sysbios_r5f_per5ft.oer5ft /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/configuro/package/cfg
/home/leo/psdk_rtos_auto_j7_07_00_00_11/ti-cgt-arm_20.2.0.LTS/bin/armcl -O4 --run_linker --emit_warnings_as_errors -w -q -u _c_int00 -c -mv7R5 --diag_suppress=10063 -qq --diag_warning=225 --diag_suppress=23000 -x --zero_init=on -x --zero_init=on    /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/utilsCopyVecs2ATcm.oer5f  /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/main_mcspi_slave_mode.oer5f  /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/SPI_log.oer5f /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/obj/j721e_evm/mcu1_0/release/configuro/linker_mod.cmd /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode/j721e/linker_mcu_sysbios.lds -o /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/bin/j721e_evm/MCSPI_Master_j721e_evm_mcu1_0TestApp_release.xer5f -m /home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/bin/j721e_evm/MCSPI_Master_j721e_evm_mcu1_0TestApp_release.xer5f.map -l/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/osal/lib/tirtos/j721e/r5f/release/ti.osal.aer5f -l/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/lib/j721e/r5f/release/ti.drv.spi.aer5f -l/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/sciclient/lib/j721e/mcu1_0/release/sciclient.aer5f -l/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/i2c/lib/j721e/r5f/release/ti.drv.i2c.aer5f -l/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/csl/lib/j721e/r5f/release/ti.csl.aer5f -l/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/board/lib/j721e_evm/r5f/release/ti.board.aer5f -l/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/uart/lib/j721e/r5f/release/ti.drv.uart.aer5f  /home/leo/psdk_rtos_auto_j7_07_00_00_11/ti-cgt-arm_20.2.0.LTS/lib/libc.a
<Linking>
error: creating output section ".utilsCopyVecsToAtcm" without a SECTIONS
   specification
error: errors encountered during linking;
   "/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/bi
   nary/MCSPI_Master_TestApp/bin/j721e_evm/MCSPI_Master_j721e_evm_mcu1_0TestApp
   _release.xer5f" not built

>> Compilation failure
/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/build/makerules/rules_ti_cgt_arm.mk:311: recipe for target '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/bin/j721e_evm/MCSPI_Master_j721e_evm_mcu1_0TestApp_release.xer5f' failed
make[2]: *** [/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/binary/MCSPI_Master_TestApp/bin/j721e_evm/MCSPI_Master_j721e_evm_mcu1_0TestApp_release.xer5f] Error 1
make[2]: Leaving directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/build/makerules/common.mk:402: recipe for target 'mcu1_0' failed
make[1]: *** [mcu1_0] Error 2
make[1]: Leaving directory '/home/leo/psdk_rtos_auto_j7_07_00_00_11/pdk_jacinto_07_00_00/packages/ti/drv/spi/example/mcspi_slavemode'
makefile:358: recipe for target 'MCSPI_Master_TestApp' failed
make: *** [MCSPI_Master_TestApp] Error 2

    Fullscreen linker_mcu_sysbios.lds.txt Download 
    /* linker options */
--fill_value=0
--stack_size=0x2000
--heap_size=0x1000

-e __VECS_ENTRY_POINT

MEMORY
{
    MCU0_R5F_TCMA (X)     : origin = 0x100      , length = 0x8000 - 0x100
    RESET_VECTORS(X)      : ORIGIN = 0x00000000 , LENGTH = 0x100  /* Bottom 256 KB used by SBL */
    R5F_TCMB0(RWIX)       : ORIGIN = 0x41010000 , LENGTH = 0x00008000
    MSMC3(RWIX)           : ORIGIN = 0x70080000 , LENGTH = 0x770000
    DDR0(RWIX)            : ORIGIN = 0x80000000 , LENGTH = 0x80000000
    MCU1_0_MSRAM          : origin = 0x41C40100 , length = 0x5C000 - 0x100
}

SECTIONS
{
    .vecs       : {
        __VECS_ENTRY_POINT = .;
    } palign(8) > RESET_VECTORS
    .text_boot {
        *boot.aer5f*<*boot.o*>(.text)
     }  palign(8)   > MCU0_R5F_TCMA
    .text:xdc_runtime_Startup_reset__I     : {} palign(8) > MCU0_R5F_TCMA
    .text:ti_sysbios_family_arm_v7r_Cache* : {} palign(8) > MCU0_R5F_TCMA
    .text:ti_sysbios_family_arm_MPU*       : {} palign(8) > MCU0_R5F_TCMA
    .rstvectors : {} palign(8)          > MCU1_0_MSRAM

    /* For NDK packet memory, we need to map this sectionsbefore .bss*/
    .bss:NDK_MMBUFFER  (NOLOAD) {} ALIGN (128) > MCU1_0_MSRAM
    .bss:NDK_PACKETMEM (NOLOAD) {} ALIGN (128) > MCU1_0_MSRAM

    .intvecs    : {} palign(8)   > MCU1_0_MSRAM
    .bss        : {} align(4)    > MCU1_0_MSRAM
    .text       : {} palign(8)   > MCU1_0_MSRAM
    .cinit      : {} palign(8)   > MCU1_0_MSRAM
    .bss        : {} align(8)    > MCU1_0_MSRAM
    .far        : {} align(8)    > MCU1_0_MSRAM
    .const      : {} palign(8)   > MCU1_0_MSRAM
    .data       : {} palign(128) > MCU1_0_MSRAM
    .sysmem     : {} align(8)    > MCU1_0_MSRAM
    .stack      : {} align(4)    > MCU1_0_MSRAM
    .data_buffer: {} palign(128) > MCU1_0_MSRAM
}

    Thanks a lot!

    Best Regard,
    Leo Ho

  • 0 in reply to Karan Saxena
    Intellectual 340 points

    Hi Karan,

    Does there any update?

    Best Regard,
    Leo Ho

  • 0 in reply to leo ho
    TI__Expert 5970 points

    Response from the author of this thread:

    HI TI members,

    I have asked the question in this thread, but there's no replied and locked the thread.

    Is there any update in 07_02 version?

    Thanks a lot!!

    Best Regard,
    Leo Ho

  • 0 in reply to Sunita Nadampalli
    TI__Guru* 78015 points

    Hi Leo Ho,

    Which core do you want to run the app on?

    Regards,

    Karan

  • 0 in reply to Karan Saxena
    Intellectual 340 points

    Hi Karan,

    I want to run on mcu1_0.

    Best Regard,
    Leo Ho

  • 0 in reply to leo ho
    TI__Guru* 78015 points

    Hi Leo Ho,

    After SDK7.0 there has been an architectural change due to which the MCU1_0 applications have integrated Device Manager running and hence can only be loaded via R5 SPL. Loading from u-boot is not an option for MCU1_0 apps now.

    You can look at the developer note for more details -  

    Regards,

    Karan