Hello,
Could you help with the following query for Astrium who have couple of technical queries on the TRF3761 VCO.
This concerns the SPI interface (description from their Software engineer below)
The datasheet states that the device has a 3 wire serial programming interface (SPI), however this is not the same as Serial Peripheral Interface (SPI).
The I/F on the VCO does not have a chip select pin to enable the clock and data inputs to the device. It does have a chip enable (CHIP_EN) which needs to be pulled high otherwise the device is disabled.
We can use this with an Serial Peripheral Interface but we will need to isolate the CLOCK and DATA lines on the VCO from other devices on the SPI bus. I suggest ANDing the SPI_CLOCK signal with an inverted chip select and feeding the output of the AND gate to the CLOCK input of the VCO. When the chip select is high the CLOCK input to the VCO will be low (because of the inversion on the chip select). When the chip select is high, the CLOCK input will follow the state of the SPI_CLOCK.
We could do this with the DATA line also, this will ensure that the CLOCK and DATA inputs are delayed by the same amount and stay in sync.
thanks
Adrian
