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DAC38RF89: With Cml Clock , DAC38RF89 isnot work well

user5103379
Prodigy 50 points
Part Number: DAC38RF89
Other Parts Discussed in Thread: LMX2594, , LMK04828, LMK04832

In my design, I use LTC6955 to DAC38RF89，And Provide CLock to LTC6955 by LMX2594，LTC6955 is CML output clock buffer，But DAC38rf89 is need LVPECL Clock，though AC Couple， I connect their， is ok?

In this states, I use 81180 JESD mode， Anything sees ok，but short pattern Test is not ok，And Nothing happened in dac's output；I through register config, config NCO, spi constant output，is need pull down txen before? I didnot pulldown this pins，and also no output；I use K21.5 test, ILA test, and Ignore ILA transfer，all same answer；reg 0x64-0x6B，keep all zero's。In LMK04828, is ok；also in LMK04832，when LMK04832 is config LVPECL , is ok, config cml, the same as used LTC6955.

  • 0
    TI__Guru 67904 points

    Hi,

    Please provide clock connection diagram, schematics, and also the scope shot of the clock waveform for us to determine if the clocking is OK.

    Short pattern test is meant to check if the transmitted JESD204 data is valid at the DAC JESD204 receiver side. It is to cross check the valid data receipt. Short pattern will not be transmitted to the DAC output.

    user5103379 said:
    In this states, I use 81180 JESD mode， Anything sees ok，but short pattern Test is not ok，And Nothing happened in dac's output

    Please be specific on what you mean "short pattern test is not OK". Not OK can mean many things.

    user5103379 said:
    I through register config, config NCO, spi constant output，is need pull down txen before? I didnot pulldown this pins，and also no output；

    If you use constant SPI data, you should get constant TX output at the NCO rate regardless of the TXENABLE state. We recommend you pull up TXENABLE to double check as TXENABLE is need to logic HI to start the DAC transmission. 

    user5103379 said:
    I use K21.5 test, ILA test, and Ignore ILA transfer，all same answer；reg 0x64-0x6B，keep all zero's。

    Please be more specific on the testing of K21.5 (there is no K21.5 test, only D21.5), ILA test, etc. I am not understanding your testing.

    The error for these sequences comes out the lane alarms bit0. 1= a fail and 0 = pass. Reading zeros means that you are passing the test.

    user5103379 said:
    In LMK04828, is ok；also in LMK04832，when LMK04832 is config LVPECL , is ok, config cml, the same as used LTC6955.

    I am not understanding the above question/comment also. Clear, thorough questions are required before we can provide clear and thorough answers. 

    -Kang