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Part Number: DAC38RF83
We wan to use DAC38RF83 at REF CLK 9000MHz , to generate LFM at BW = 700MHz arout Fout = 2850MHz.
We want to use LMK04832 part to synchronize the DAC (SysREF & REF CLK), however the LMK04832 can't generate REF CLK at 9000MHz (The maximum PLL is 3255MHz)
1. Please explain how to work with this DAC with REF CLK = 9000MHz and SYSREF synchronized.
2.Please , send block diagram described the implementation.
To emphasize my question, generation of REF CLK = 9000MHz should be without internal DAC PLL. Using external clock generator such as multiplier or low phase noise PLL .
You are interested in operating the DAC38RF8x with an external clock and not using the internal PLL/VCO. You can reference the clock set-up found in the TSW40RF80 reference design. That set-up is not exactly what you need as it was intended for an external clock for the ADC, but the concept will be similar. The approach is to still use the LMK04828 (or LMK04832) which will provide a reference synchronized with sysref signal. The reference signal from the LMK is fed to the input reference of the LMX2594 or equivalent PLL/VCO capable of operating at 9 GHz. That clock is then provided as the external clock to the DAC.
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