This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

HDC1080: minimum fCLK

Part Number: HDC1080

Hello,

If the I2C signal rise and fall times comply with the 1000 ns and 300 ns maximum requirements, what is driving the datasheet limitation of the fCLK (fscl) to min 10kHz?

Thank you

  • Hello,

    Our devices have a minimum frequency due to the SMBus Timeout feature. Hence we don not recommend using this device below 10KHz. If the I2C transaction takes too long to complete, timeout will cause the sensor to stop responding. Depending on when the timeout occurs and what type of transaction, you might see a NACK. 

    Regards,
    Pavani Tenneti