AFE3010: AFE3010 application

Hello valued engineer,

I am looking this over and will respond shortly.

Sincerely,

Peter

Hello valued engineer,

1. SCR pin is a current driver. The exact voltage when pin is activated depends on the load resistance it drives, specifically the SCR gate and any resistance in-series with it. When firing the SCR, the time duration of the pulse will at least be one positive half cycle. Maximum duration will be two full line cycles. Cycle length is determined by measuring the zero crossings at the PH pin.
2. Yes, if device detects leakage current it drives SCR and blinks ALARM indefinitely until device is power cycled or RESET. It will stop performing self test. If you want to RESET device (resets internal fault counter), then you can use either PTT or SWOPEN (see Figures 11-14) in datasheet. If you want to reset device without it firing the SCR from the self test, you have to provide a 55ms signal to SWOPEN pin (see the tD4 time specification in electrical characteristics table in datasheet).
3. The tolerance for R11 does not have to be tight, +/-10% is fine. Also the line voltage does not affect the required resistance of tolerance here. However, the larger line voltage does mean you need increase power dissipation in R11. I should note that R11 can actually be increases up to 68 kOhm, which will help decrease power dissipation required. Power dissipation is based on that SCRTST is clamped to 20-V every positive line cycle and floating during negative cycle due to D2. I have provided a power dissipation calculator for R11 (and other resistors) for higher line voltages. With a 68-KOhm R11, you could use a 3/4W resistor rating.
4. Figure 10 describes sequence for the periodic self test. The continuous tests are described in 7.3.7.2..
5. The rising time should be limited to ~10ms. However, a final validation of power up trip times should be performed because of system level differences. The trip times at power up scenarios is affected by rising time because this delay will be included in the overall trip time. You also do not want the RC time constant to be too fast because VDD can collapse more easily during failure condition when one of the diodes in the rectifier (D1) are opened/shorted. The VDD resistors and capacitor shown in the datasheet did provide compliant trip times at power up over temperature and stable VDD during D1 failure conditions.
6.  1440.AFE3010 BOM_calculations.xlsx

Sincerely,

Peter

Dear Peter,

For SCR pulse width, is the SCR pulse width different in the following 3 cases?  Can you tell me more about it? 
- self test PASS & NG
- Current leakage detected
- Device reset (ie. reset with PTT)

Best regards.

Lin Yu

Dear Peter,

Thank you for your reply. Here I have some more questions as below .

1.  " Yes by “device turns on SCR” I mean that the SCR pin starts driving current to turn on SCR", Does it mean that the SCR pin will start driving current to turn on SCR during each self test ?

2. Do you think have any problem on below circuitry design with transisitor instead of SCR? or do you have any other sugguestion?

      

Best regards.

Lin Yu    

Dear Peter,

Thank you for your reply,

Last question,

As you can see, There is  C11 in  typical application ,but not in GFCI application, is it necessary? If so， what is the range  of value?

Best regards.

Lin Yu

Hey Lin,

You definitely want to use the schematic shown in Figure 15, so yes you probably will need a C11. I recommend a typical value of 2.2nF in Table 5 of datasheet. This capacitance is helpful in keeping the SCR stable from noise or high voltage surges, but it can't be too high (~ 10nF; exact value should be validated for your system) because it will interfere with the SCR self test.

Sincerely,

Peter

Hey Lin,

1. For SCR's self test (which is only done when SEL=GND), the self test will only pass if SCR_TST is connected to the anode of an SCR and that voltage is a half-rectified signal that goes between >=20V and 0V (with respect to AFE3010 GND) and the signal has same frequency as voltage at PH pin. 

2. With SWOPEN =float, this will not work because the subsequent actions to a ground fault and a self-test fail are the same: SCR fires and ALARM blinks. In order to digitally distinguish between self-test fail and ground fault you would need to actually be monitoring OUT pin to look for out-of-range signals (Vout > 2.75V or Vout < 2.25V) that would indicate device is detecting a true ground fault.

Now if SWOPEN is always LOW, then you could use distinguish between a self-test fail and ground fault by only looking at ALARM pin as shown in Table 3 of datasheet.

The self-test pass when pressing PTT would present another condition, because once PTT is pressed and device passes the single, subsequent self-test, the AFE3010 will fire SCR once as shown in Figure 11.

3.  For SEL=GND and SW_OPEN = GND, 

At power up and device passes first self-test, ALARM is on with no blinking.

At power up and device fails first self-test, SCR fires and ALARM blinks.

With a H-G or N-G fault, SCR fires and ALARM is on with no blinking.

If PTT is pressed and device had previously failed a self-test/detected fault AND AFE3010 passes subsequent self-test, THEN SCR is fired and ALARM will stop blinking and go back to constant on.

If PTT is pressed and device had previously failed a self-test/detect a fault AND AFE3010 fails subsequent self-test, THEN ALARM will remain blinking.

If PTT is pressed and device had not previously failed a self-test AND AFE3010 passes subsequent self-test, THEN SCR is fired and ALARM will remain ON.

If PTT is pressed and device had not previously failed a self-test AND AFE3010 fails subsequent self-test, THEN ALARM will begin blinking. (This is a very rare occurrence).

Sincerely,

Peter

Hello Lin,

To distinguish between a self-test fail (EOL condition) and a ground fault, there are two options:

A. SWOPEN = float. Constantly monitor SCR or load switch. If SCR is fired (or load switch opened), then monitor ALARM for ~2 seconds. If ALARM is blinking at 0.5Hz, then there is an EOL condition. If ALARM is not blinking, then it was a ground fault. This assumes that activating SCR pin opens the load switch.

The only exception to make for this option is when PTT/SW_OPEN is being pressed low because a self-test is performed when PTT/SWOPEN is pressed. If this self-test passes, then SCR is fired (Figures 11 and 13 of datasheet). If the self-test does not pass, then SCR does not fire but ALARM does blink (Figure 12 of datasheet).

B. Second option is as you describe. Once SCR is fired, pull SW_OPEN low and monitor ALARM for about 1 second to see if goes constant high (ground fault) or continues blinks (EOL condition). Then release SW_OPEN.

In short, I would just recommend using option A as it requires the least amount of code/hardware.

Here are the answers to your questions:

1. The duration to pull SW_OPEN low has two timing specifications (tD2 and tD4, see electrical characteristic section 6.5 of datasheet). tD2 is the amount of time to hold SW_OPEN low in order for device to fire SCR and reset internal fault counter. tD4 is the amount of time to hold SW_OPEN low to reset internal fault counter without firing SCR.

2. If SW_OPEN is low, ALARM will be constant high always unless an EOL condition is detected.

3. If SW_OPEN is low, and an EOL condition is detected, ALARM will blink at 0.5Hz.

4. Yes, you can use SW_OPEN to reset device (reset the internal fault counter) if device detected a ground fault or failed a self-test (see Figures 13 and 14 of datasheet).

Sincerely,

Peter