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TMP112: power on sequence glitch issue

Part Number: TMP112

Hi Sir,

TMP112 power-on sequence, we use the same power supply for VDD and SDA pull up 1.8V now, as shown in <Figure 1>schematic

<Figure 2> We did two experiments:
1. When the system is directly powered on, the SDA pin will have a glitch as shown in the green waveform. Is this caused by the fact that the internal logic circuit is not ready? There is no power-on suggestion in the spec.
2. Give VDD 1.8V first, and then pull up 1.8V to SDA, no glitch.

Is this any risk?

Figure 1:

Figure 2 :