Is it possible to simulate an error condition in the eval kit in order to trigger a fault and interrupt for testing purposes?
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Is it possible to simulate an error condition in the eval kit in order to trigger a fault and interrupt for testing purposes?
Hi Andrew,
it's possible.
The INT can be triggered by the LOD and LSD issue. we have EVM Board and remain the pin to make an error condition so with registers setting it's easy to simulate such test.
So do you have EVM Board and Datasheet on your hand?
BR
Monet Xu
Hi Andrew,
please reply to the below questions.
since the details of these documents are NDA information, you can send to me by mail.
Email address: monet-xu@ti.com
By the way, what's your end applicaiton?
BR
Monet Xu