AWRL6432: Question about 1.8V optimized power rail, and another question

Hi Chase,

Please allow us until Monday to provide a response.

Tim

Dear Tim,

Thank you for your support, hope you had a good weekend.

Please let me know if there are any updates about the question I asked. Thanks.

Best regards,

Chase

Hi Chase,
     AWRL6432 have internal LDO to generate 1.2V from 1.8V supply. Please refer to the AWRL6432 datasheet for maximum current ratings per voltage rail for various power and IO topologies.

Regards,
Sivaprasad

Hi Chase,

Can you clarify question 2/3 above? What bootloader do they want to flash? Does customer want to use a secondary bootloader? 

Please look at our SBL example and documentation in our SDK, that may clarify some questions.

Regards,

Tim

Dear Sivaprasad, Tim,

Thank you for your support.

 AWRL6432 have internal LDO to generate 1.2V from 1.8V supply. Please refer to the AWRL6432 datasheet for maximum current ratings per voltage rail for various power and IO topologies.

-> I only could found the table below. Could you confirm that 1100mA is the maximum output current from internal LDO?

And Here is more question.

I found that there are 4 power rails that need 1.2V voltage. (VDD, VDDA_12RF, VDD_SRAM, VNWA)

Could you check the maximum power consumption of each 4 power rails?

Especially My customer wants to set the RF output power up to 10dBm. Please also check that the maximum current can support this RF output power.

Can you clarify question 2/3 above? What bootloader do they want to flash? Does customer want to use a secondary bootloader? 

-> I did not understand fully about this device. Sorry in advance about silly questions.

1. Does this device have on-chip ROM memory which can write user application?

(cause I saw the word "on-chip ROM memory" in 9.6 Boot Modes Section in the datasheet.)

If so, which interface can we use when I flash on-chip ROM memory? (JTAG or/and UART?)

2. Can I write secondary boot loader on AWRL6432 as you said?

If so, which interface can we use when I flash secondary boot loader? (JTAG or/and UART?)

3. Is JTAG interface only for debug?

4. If I use Flashing mode using SOP1 and SOP1 pin to zero, which interface can we use when I flash external serial memory? (JTAG or/and UART?)

5. If I use Debug mode using SOP1 and SOP1 to 1, Can I use JTAG or UART for debug?

6. Should I set more to use SOP combinations?

(i.e. I have to add more components to use Flashing mode, or something else.)

7. My customer is going to use dip switch to control SOP1 and SOP0 pin. is it okay?

Please check these questions. Thanks in advance.

Best regards,

Chase

Hi Chase,
My previous answer was regarding BOM optimized topology. I sincerely apologize for that. In power optimized topology 1.2V should be supplied externally. Can you please confirm which power topology are you referring to?

Regards,
Sivaprasad

Dear Sivaprasad,

Thank you for your support.

My customer will use "8.5.3 Power Optimized 1.8V I/O Topology" for high antenna power.

in this case we have to use 2 power lines, 1.8V and 1.2V. Is it right?

How about the maximum current of all 1.2V power rail? Is 500mA LDO okay? or should I use LDO which have higher output current?

And please check the other questions, no 1 to no 7.

Best regards,

Chase

1. Does this device have on-chip ROM memory which can write user application?

No, this is for The primary bootloader only

(cause I saw the word "on-chip ROM memory" in 9.6 Boot Modes Section in the datasheet.)

If so, which interface can we use when I flash on-chip ROM memory? (JTAG or/and UART?)

2. Can I write secondary boot loader on AWRL6432 as you said?

If so, which interface can we use when I flash secondary boot loader? (JTAG or/and UART?)

Yes you can write SBL to device. Please look at our SBL example documentation in SDK. You can flash over UART

3. Is JTAG interface only for debug?

Primarily, yes

4. If I use Flashing mode using SOP1 and SOP1 pin to zero, which interface can we use when I flash external serial memory? (JTAG or/and UART?)

UART

5. If I use Debug mode using SOP1 and SOP1 to 1, Can I use JTAG or UART for debug?

Yes, JTAG

6. Should I set more to use SOP combinations?

(i.e. I have to add more components to use Flashing mode, or something else.),

we typically only use flashing, functional, and debug modes.

7. My customer is going to use dip switch to control SOP1 and SOP0 pin. is it okay?

Yes, this is fine

Hi Chase,
In Power optimized 1.8V IO mode, the device should be powered using two rails (1.8V and 1.2V). Peak current rating of 1.2V rail in this mode is 1100mA. LDO should be able to meet this current requirement.

Regards,
Sivaprasad

Dear Sivaprasad,

Thank you for your support.

I still do not understand clearly. Please check the questions below;

1. In the table 8.7, I can see the power consumption of power optimized mode is lower than BOM optimized mode. So I think that power optimized mode is using more ICs to reduce current consumption. And BOM optimized mode is using minimum ICs to reduce BOM cost. instead BOM optimized mode have more current consumption. Am I right?

2. Please confirm again, Should I use "power optimized" 1.8V IO mode for 15dBm TX power?

what is the current consumption of 15dBm TX power only? can you guess?

3. If we use "BOM optimized" 1.8V IO mode, can I use 10dBm TX power as mentioned in table 8-7?

Best rgards,

Chase

Dear Sivaprasad,

Thank you for your support, and hope you had a good weekend.

Here are some questions from my customer. Could you check these questions?

1. What is the maximum output current of "VDDA_10RF" (L3,M3) pin?

2. What is the maximum output current of "VOUT_14APLL"(G5) pin?

3. What is the maximum output current of VOUT_14SYNTH"(D3) pin?

4. Can I add(connect) "VOUT_14APLL"(G5) or VOUT_14SYNTH"(D3) to "VDDA_10RF" if the output current of VDDA_10RF is not enough?

Like I said, my customer wants to make maximum TX power.

and if Yes, my customer will use resistor divider to make 1.0V(or 1.2V) from 1.4V, and connect it to VDDA_10RF pin.

Please check this issue. Thanks.

Best regards,

Chase

Dear Sivaprasad,

Thank you for your support.

You mean that I cannot use other internal power lines to make 15dBm TX power. right?

Please make it clear.

Best regards,

Chase

Hi Chase,
Yes, you cannot use any power rails to achieve more than 11dBm of output power per Tx. Please consider antenna gain and BPM to increase total RF output power.

Regards,
Sivaprasad