Part Number: OPT3101
Hello,
We use the OPT3101 in one of our products.
There seems to be a problem with the phase. After initializating the OPT, I tried to perform illumination crosstalk & phase offset calibration. Then, I converted the acquired phase into a distance, using the datasheet's equation.
But the distance is always changing, it is not stable at all. And when I say this, I mean it can pass from 1234 to 9876 suddenly, it is not just a difference of a few mm or cm.
So I am digging in, trying to see where the problem comes from. Now I am reading PHASE_OUT[23:16] to see if there is a problem in the reading of the phase. I alternatively get 0x12 & 0x92. According to the datasheet, that means that I use ILLUM_DAC_H, which is right; that the FRAME_STATUS is valid; and that I alternatively get 0 and 1 in the frame counter's LSB bit, which seems normal to me.
That means I do not have any problem on the reading of the phase. So why am I getting around 9900 or 10000 as the value of the phase? According to the datasheet's equations, it should be around 1749 (I am at 40 cm of the target). As I do not do any calibration, just the registers initialization, I am aware that I will not get 1749, but I did not expect such a difference.
Does somebody have an idea about that?
You will find my registers initialization attached below.
EDIT: The structure is such that:
typedef struct { uint8_t registerAddress; uint8_t eepromAddress; uint32_t value;} initValues_s;
/* EN_TEMP_CONV = enabled */
{EN_TEMP_CONV, 0x59, 0xA0000},
/* OVERRIDE_CLKGEN_REG = 0, CLIP_MODE_OFFSET = wrap around, CLIP_MODE_TEMP = wrap around, CLIP_MODE_NL = wrap around, CLIP_MODE_FC = clip */
{CLIP_MODE_FC, 0x00, 0x200101},
/* XTALK_FILT_TIME_CONST = 3 (tau = 8), IQ_READ_DATA_SEL = internal crosstalk, USE_XTALK_REG_ILLUM = register value, USE_XTALK_FILT_ILLUM = filter, USE_XTALK_REG_INT = register value, USE_XTALK_FILT_INT = filter, INT_XTALK_CALIB = 0, DIS_AUTO_SCALE = enabled, FORCE_SCALE_VAL = 0 (digital scale = 64) */
{FORCE_SCALE_VAL, 0x26, 0x3001E0},
/* IAMB_MAX_SEL = 11 (= 50 uA) */
{IAMB_MAX_SEL, 0x00, 0xB0},
/* TEMP_COEFF_XTALK_IPHASE_HDR0_TX0 = 177 */
{TEMP_COEFF_XTALK_IPHASE_HDR0_TX0, 0x20, 0xB10000},
/* TEMP_COEFF_XTALK_QPHASE_HDR0_TX0 = 224 */
{TEMP_COEFF_XTALK_QPHASE_HDR0_TX0, 0x23, 0xE00000},
/* TEMP_COEFF_XTALK_IPHASE_HDR1_TX0 = 157 */
{TEMP_COEFF_XTALK_IPHASE, 0x53, 0x9D00},
/* TEMP_COEFF_XTALK_QPHASE_HDR1_TX0 = 212 */
{TEMP_COEFF_XTALK_QPHASE, 0x56, 0xD4},
/* SCALE_AMB_COEFF_XTALK = 4, SCALE_TEMP_COEFF_XTALK = 6, EN_TEMP_XTALK_CORR = enabled */
{SCALE_TEMP_COEFF_XTALK, 0x3B, 0x4D0000},
/* TEMP_COEFF_MAIN_HDR0_TX0 = 1100 */
{TEMP_COEFF_MAIN_HDR0_TX0, 0x50, 0x44C},
/* TEMP_COEFF_MAIN_HDR1_TX0 = 1300 */
{TEMP_COEFF_MAIN_HDR1_TX0, 0x4A, 0x514},
/* GPIO2_IBUF_EN = enabled, GPIO2_OBUF_EN = enabled, GPIO1_OBUF_EN = enabled, GPO2_MUX_SEL = DVSS, GPO1_MUX_SEL = DIG_GPO_0, GPO3_MUX_SEL = DVSS */
{GPIO_REGISTER, 0x00, 0x19080},
/* AMB_CALIB = 70, DIG_GPO_SEL2 = 0, DIG_GPO_SEL1 = FRAME_VD, DIG_GPO_SEL0 = DATA_RDY */
{AMB_CALIB, 0x65, 0x118009},
/* PDN_GLOBAL = active, DIS_GLB_PD_I2CHOST = enabled, DIS_GLB_PD_OSC = disabled, DIS_GLB_PD_AMB_ADC = disabled, DIS_GLB_PD_AMB_DAC = disabled, DIS_GLB_PD_AFE_DAC = enabled, DIS_GLB_PD_AFE = enabled, DIS_GLB_PD_ILLUM_DRV = enabled, DIS_GLB_PD_TEMP_SENS = enabled, DIS_GLB_PD_REFSYS = disabled */
{GLOBAL_POWER, 0x00, 0x161},
/* POWERUP_DELAY = 95 (= 152 us) */
{POWERUP_DELAY, 0x00, 0x17C0F},
/* NUM_AVG_SUB_FRAMES = 63, NUM_SUB_FRAMES = 63 */
{NUM_AVG_SUB_FRAMES, 0x00, 0x3F03F},
/* TG_SEQ_INT_START = 9850 */
{TG_SEQ_INT_START, 0x00, 0x267A},
/* TG_SEQ_INT_MASK_END = 127 */
{TG_SEQ_INT_MASK, 0x00, 0x7F000},
/* ILLUM_SCALE_H_TX0 = 1.4 mA, ILLUM_SCALE_L_TX0 = 1.4 mA, HDR_THR_HIGH = 50000 */
{ILLUM_SCALE_H_TX0, 0x1A, 0x1BC350},
/* HDR_THR_LOW = 2000 */
{HDR_THR_LOW, 0x1D, 0x7D0},
/* ILLUM_DAC_H_TX0 = 23, ILLUM_DAC_L_TX0 = 13 */
{ILLUM_DAC_H_TX0, 0x5F, 0x2ED},
/* EN_TX_CLKB = enabled */
{EN_TX_CLKB, 0x62, 0x1},
/* MUX_SEL_COMPIN = PHASE_OUT is used for comparator input register */
{MUX_SEL_COMPIN, 0x00, 0x3},
/* DIS_INTERRUPT = disabled */
{DIS_INTERRUPT, 0x00, 0x80000},
/* EN_FREQ_CORR = enabled, EN_FLOOP = enabled, EN_AUTO_FREQ_COUNT = measured value, SYS_CLK_DIVIDER = 10, START_FREQ_CALIB = 0, REF_COUNT_LIMIT = 19531 */
{EN_FREQ_CORR, 0x0E, 0xF44C4B},
/* EN_CONT_FCALIB = frequency continuously measured */
{EN_CONT_FCALIB, 0x00, 0x8000},
/* PHASE_OFFSET_HDR0_TX0 = 7747 0x1E43 / 1455 0x5AF / 0 */
{PHASE_OFFSET_HDR0_TX0, 0x05, 0x0},
/* PHASE_OFFSET_HDR1_TX0 = 7497 0x1D49 / 1455 0x5AF / 0 */
{PHASE_OFFSET_HDR1_TX0, 0x08, 0x0},
/* TMAIN_CALIB_HDR0_TX0 = 2386 */
{TMAIN_CALIB_HDR0_TX0, 0x0B, 0x952},
/* TMAIN_CALIB_HDR1_TX0 = 2386 */
{TMAIN_CALIB_HDR1_TX0, 0x11, 0x952},
/* GIVE_DEALIAS_DATA = 0, AMB_PHASE_CORR_PWL_X1 = 0, AMB_PHASE_CORR_PWL_X0 = 0 */
{AMB_PHASE_CORR_PWL, 0x00, 0x0},
/* EN_TX1_ON_TX0 = 1 */
{AMB_PHASE_CORR_PWL_X2, 0x77, 0x400},
/* A1_COEFF_HDR0_TX0 = 0 */
{A1_COEFF_HDR0_TX0, 0x00, 0x0},
/* A2_COEFF_HDR0_TX0 = 0 */
{A2_COEFF_HDR0_TX0, 0x00, 0x0},
/* A3_COEFF_HDR0_TX0 = 0 */
{A3_COEFF_HDR0_TX0, 0x00, 0x0},
/* A4_COEFF_HDR0_TX0 = 0 */
{A4_COEFF_HDR0_TX0, 0x00, 0x0},
/* SCALE_PHASE_TEMP_COEFF = 2, EN_TEMP_CORR = disabled, EN_PHASE_CORR = enabled */
{EN_TEMP_CORR, 0x4D, 0x81}, /* modif SCALE_PHASE_TEMP_COEFF EN_TEMP_CORR */
/* SUB_VD_CLK_CNT = 9999, TG_EN = enabled */
{TG_EN, 0x00, 0x4E1F},
/* MONOSHOT_FZ_CLKCNT = 9900, MONOSHOT_NUMFRAME = 6, MONOSHOT_MODE = continuous mode */
{MONOSHOT_MODE, 0x00, 0x26AC18},
/* SEL_HDR_MODE = ILLUM_DAC_H, EN_ADAPTIVE_HDR = disabled, TX_SEQ_REG = 0-0-0-0-0-0, SEL_TX_CH = TX0, EN_TX_SWITCH = disabled */
{EN_ADAPTIVE_HDR, 0x17, 0xF90000}
PS: If you are French, do not hesitate to MP me, please. I will redirect you to my superior, who is looking for a consultant.
