• Locked Locked
  • Replies 6 replies
  • Subscribers 33 subscribers
  • Views 1891 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LDC1000 datasheet errors: Rp_MIN, Frequency Counter (Fcount)

Vitaliy Velychko
Prodigy 30 points
Other Parts Discussed in Thread: LDC1041, LDC1051

I found a few errors in the datasheet LDC1000.pdf (Rev. C, SNOSCX2B).


The first problem is default value of the register Rp_MIN (0x14, page 17). It is a HW error, but no word about it is in datasheet. When I saw it at the first time, I had to find a problem - is there wrong default value or wrong Rp_MIN indexing (0x20-0x3F or 0x00-0x1F). This problem has been discussion here: e2e.ti.com/.../328099 but until now no sign about it in the datasheet.

The second problem is the register with address 0x05 (page 15). Register name is RESERVED, direction is RO - ReadOnly and default value is 0x01. When I tried  to read the Frequency Counter Data (0x23-0x25), I got only zero value. I spent 2 days to get some non-zero data, tried to initialize with different values, checked different oscillators and power supplies, even resolder the chip and solder another chip - nothing helped. Then I started reading a Application notes, and in the datasheet "LDC1000/LDC1041/LDC1051 Evaluation Module. User's Guide" (SNAU150A) I found on page 5 next configurations: "Clock Configuration: Clock Power Down (CLK_PD): Enable Frequency Counter Clock" and "Clock Configuration: Clock Selection (CLK_SEL): External Time-Base Clock (TBCLK)". Hm... Interesting... Then I download SW "LDC1000 Firmware Library for the MSP430" (snac059.zip) and what I found there? "#define LDC1000_CMD_CLKCONFIG 0x05" and "retVal &= spi_writeByte(NULL,LDC1000_CMD_CLKCONFIG,   0x00);" (LDC1000_cmd.h)! Read-only register 0x05 with name Reserved and default value 0x01 has been initialized as CLKCONFIG with value 0x00. After I tried this trick in my own SW the Frequency Counter started count. Maybe the register with address 0x05 has more parameters and I would like to know them.


I would like to see the changes in the LDC1000 datasheet, to see the other users are not faced with these problems.
There is a big probability that the same errors has datasheet of LDC1041. Please check it and update.
Thank you.

  • TI__Genius 14270 points
    Hello Vitaliy,

    My apologies for the errors in the datasheet. We will have an update to the datasheet which addresses your findings.

    Regards,
    Chris O
  • Prodigy 170 points

    Dear Vitaliy, 

    I am experiencing a similar situation to you; streaming proximity values (0x21-0x22) but reading zeros for Fcount. By the way I am referring Rev. C (SNOSCX2C), which seems to be modified to include what you found. http://www.ti.com/lit/ds/symlink/ldc1000.pdf

    I can read proximity values by reading from register 0x21 to 0x22 via the extended transaction (total 24 bits including the command field). But when I try to read 0x23 through 0x25 via the extended transaction (32 bits), it gives me zeros. I have configured the INTB mode as all disabled (b000), and the clock configuration as the default (CLK_SEL:0, CLK_PD:1). I am providing the chip with an external clock of 5MHz and 3.3V. 

    Do you have any hunch why I cannot read the Fcount values? I will really appreciate it if you can help me fix this problem.

    Best regards,

    Minkyun Noh

  • in reply to Minkyun Noh
    Prodigy 30 points
    Dear Noh,
    here is my scheme: kmf.troja.mff.cuni.cz/.../LDC1000.pdf
    I am using PWM output (8 MHz) from MPU as external clock.
    To the register "Clock Configuration" (0x05) I wrote zero value.
    Your configuration "I have configured the INTB mode as all disabled (b000), and the clock configuration as the default (CLK_SEL:0, CLK_PD:1)" is wrong - CLK_PD =1 mean "1: Crystal drive is disabled".
    You have to change register "Clock Configuration" (0x05) to zero value (CLK_SEL:0, CLK_PD:0).
    Best regards,
    Vitaliy
  • in reply to Vitaliy Velychko
    Prodigy 170 points
    Thanks! It works!

    But the datasheet says (Table 9 in Ver. C SNOSCX2C, www.ti.com/.../ldc1000.pdf) for CLK_PD
    0: Crystal drive enabled.
    1: Crystal drive is disabled. Use this setting to reduce power consumption with a crystal input when device is in Standby mode. Use this setting for clock input.

    Then do you think the datasheet is wrong?

    Also, I can get the frequency count data only by reading from 0x21 through 0x25. If I try to read from 0x23 through 0x25, it does not work. Did you experience the same situation?

    I really really appreciate your help!!

    Best regards,
    Minkyun
  • in reply to Minkyun Noh
    Prodigy 30 points

    Datasheet is not wrong, just "Crystal Power Down. 0: Crystal drive enabled" means "Frequency Counter is enabled" and "CLK_SEL. 1: Crystal connected across XIN/XOUT pins" means "Crystal drive is enabled". Such definition is a little bit confusing, but it work :)
    I tried to read Fcount directly from 0x23-0x25 registers, but result was negative - registers was not updated.
    TI specifies the next condition: "Conversion data is updated to the proximity register only when a read is initiated on 0x21 register. If the read is delayed between subsequent conversions, these registers are not updated until another read is initiated on 0x21".
    Without reading of 0x21 register there will not data updating.
    Best regards,
    Vitaliy

  • in reply to Vitaliy Velychko
    TI__Genius 13650 points
    Hi Vitaliy and Minkyun,
    I answered the questions in the related post: e2e.ti.com/.../501213