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MMWAVEPOEEVM: Questions on EVAL board schematic "PROC076A(001)_Sch"

jiyoung chang
Prodigy 150 points
Part Number: MMWAVEPOEEVM

is there any particular reason for diving ground into 3 pieces?

from the eval board schematic which is given by TI (the name of schematic is "PROC076A(001)_Sch")

there are 3 ground nets which are GND_RTN, GND, GND_BS

and wondering there aren't any conncetions between those grounds,

well. GND_RTN and GND are connected by capacitor C33(2200pF) but they still not connected electrically(DC open).

so, my questions are (in shortly)

1. why the grounds are separted?

2. and why those grounds are not connected?

look forward your answer

as soon as possible

thanks:)

  • 0
    TI__Mastermind 33805 points

    HI,

    Please see appnote from the POE team on designing EMI compliant POE powered device

    http://www.ti.com/lit/an/slua454/slua454.pdf?&ts=1589809148498

    Regards,

    Charles O

  • 0 in reply to Charles Oladimeji
    Prodigy 150 points

    thanks for the document

    but i still have questions.

    if the grounds are separated, how the electrical potental of signal gnd(GND) can be ground(0V)?

    due to the connector RJ45, GND_BS can be an earth ground(I understand).

    from the schematice "PROC076A(001)_Sch" which is TI given.

    GND_BS and GND_RTN and GND are still not connected.

    how the GND_RTN and GND could have 0V potential?

    Does GND_RTN need to be a 0V? if it doesn't need to. GND_RTN can be floating( I understand)

    but How about signal gnd(GND)? i think it must be a 0V. if it is, i think it must be conncted to the GND_BS using bead(which is DC short)

    but i can't see any connections between GND_BS and GND

    Look forward to your answer as soon as possible

    thank you

  • 0 in reply to jiyoung chang
    TI__Mastermind 33805 points

    Hi,

    I have contacted the POE team and will get back to you with the feedback.

    Thanks for your patience.

    Regards,

    Charles O

  • 0 in reply to Charles Oladimeji
    TI__Mastermind 33805 points

    Hi,

    The reason the grounds are not connected in this solution (like most of ours for PoE) is that we want the design to be isolated. This is advantageous because the input and out voltages are physically (and electrically) isolated and therefore adds a barrier of safety. 

    It is by no means a requirement of PoE, but most of our customers do it. This is because most PoE end equipments are touched by humans (cameras, wireless access points, IP phones), and so the risk of potential harm is reduced with isolation. It also helps protect the circuits themselves from ESD and surge events (often caused by humans). 

    Often customers will connect the Bob Smith ground and the output ground together, and that is acceptable. 

    The TI design reference page links contains isolated and non isolated designs

    https://www.ti.com/reference-designs/index.html#search?keyword=POE

    Regards,

    Charles O

  • 0 in reply to Charles Oladimeji
    Prodigy 150 points

    thanks for your answer.

    now i understand why the grounds have to be separated and

    isolation can be achieved by using fly back converter, and for isolating the feedback circuit has to be isolated too.

    So thats why the fly back converter needs optocoupler which can still have grounds separated.

    thanks for the page links that contain isolated and non-isolated design,

    but i am still wondering how the AND_GND can have ground potentials eventhough it looks like floating.

    i think i have to study deep into Flyback converter, if you have a tutorial or good explanation about it

    can you please share the document? or page links?

    thanks

     

  • 0 in reply to jiyoung chang
    TI__Mastermind 33805 points

    Hi,

    I got feedback on the VSS island which I assume you are calling the AND_GND.

    The PoE front end and the DC-DC converter are seperated in the POE system. So while the PD and PSE are negotiating power, the DC-DC is off so that it does not influence the detection / classification, and does not attempt to turn on with voltage levels below the recommended input levels (like trying to run the DC-DC on 19V when it was designed for 48V).

    So before the full power is applied, the VSS plane and the RTN plane (usually called device ground), they are separated by an internal pass FET. Then once full power is applied and the power in-rush phase is complete, this FET closes to connect VSS and RTN.

    For your reference, we have a training portal for PoE: https://training.ti.com/power-over-ethernet-poe-training-series. Please go through the training for better understanding of the system

    Regards

    Charles O