Hi there,
For one application, I want ic for the below table.
| D | logic0 | logic1 | logic2 | output1 | output2 | output3 | output4 | output5 | output6 | output7 | output8 |
| 0/1 | 0 | 0 | 0 | 0/1 | 0/1 | 0/1 | 0/1 | 0/1 | 0/1 | 0/1 | 0/1 |
| 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| 0 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
| 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 |
| 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
| 0 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
Can you suggest the IC for this?
If you want to solve this by using logic gates, you'd have to take each output individually.
For example, output1 has only one state where it outputs 'high', which is when D is HIGH, and the other 3 inputs are LOW.
From a Karnaugh map, that comes out like this:
Image from: http://www.32x8.com/var4.html
The direct solution is shown there - however, you could use a simplified solution with a 3-input NOR gate for logic[0-2], the output going into a 2-input AND, with the other input connected to the D input.
A similar analysis on each of the other 7 outputs will give you the full logic circuit required. It may end up being simplest (from a design perspective) to just invert all 4 inputs, and then use the 8 input signal to control an array of AND gates. You'll end up with quite a few gates though, and a microcontroller would be much lower cost than all those devices / plus the board space required.
