Hi Team,
Good day,
Please help provide an IBIS/AMI or Spice simulation model of below parts:
TS3L501ERUAR
TS3V712ERTGR
Best Regards
James Man
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Hi Team,
Good day,
Please help provide an IBIS/AMI or Spice simulation model of below parts:
TS3L501ERUAR
TS3V712ERTGR
Best Regards
James Man
Hi James,
Unfortunately, we do not have models for these older devices.
What are you trying to accomplish with the IBIS model here? The TS3L501E signal paths are passive FETs without any buffering so buffer information model is not applicable to the signal path. The IBIS model would only be valid for the control logic inputs of the TS3L501E which are buffered.
You can also make a simple model of the signal path using the parasitic on-state resistance Ron and onstate capacitance Con. If you'd like more information on our different types of switches please see this app note "selecting the correct signal switch"
If a spice model is needed, then one can be requested at the following link if needed: (7) Simulation, hardware & system design tools forum - Simulation, hardware & system design tools - TI E2E support forums
Thanks!
Alex
Hello Alex,
Thank you for your quick reply.
I've conveyed it to my customer.
Have a nice day .
James