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CCS/TMS320DM8148: JTAG : IcePick_D_0: Error: (Error -261 @ 0xFFFFFEFB) Invalid response was received from the XDS110

Part Number: TMS320DM8148

Tool/software: Code Composer Studio

On the console, I have :

IcePick_D_0: Error: (Error -261 @ 0xFFFFFEFB) Invalid response was received from the XDS110

Hardware:TMDXEVM8148

JTAG: XDS110

CCS : 7.0 on Linux

[Start: Texas Instruments XDS110 USB Debug Probe_0]

Execute the command:

%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -S integrity

[Result]


-----[Print the board config pathname(s)]------------------------------------

/home/ti/.ti/ti/0/0/BrdDat/testBoard.dat

-----[Print the reset-command software log-file]-----------------------------

This utility has selected a 100- or 510-class product.
This utility will load the adapter 'libjioxds110.so'.
The library build date was 'Feb  8 2018'.
The library build time was '18:25:14'.
The library package version is '7.0.188.0'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '5' (0x00000005).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.

-----[Print the reset-command hardware log-file]-----------------------------

The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the XDS110 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for XDS110 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).

-----[Perform the Integrity scan-test on the JTAG IR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG IR Integrity scan-test has succeeded.

-----[Perform the Integrity scan-test on the JTAG DR]------------------------

This test will use blocks of 64 32-bit words.
This test will be applied just once.

Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.

The JTAG DR Integrity scan-test has succeeded.

[End: Texas Instruments XDS110 USB Debug Probe_0]

So what would be the problem?

Thanks!

  • Hi,

    This particular error message is a bit unusual. The only report is shown in the thread below, but it is related to a Hardware error.
    e2e.ti.com/.../484513

    I am still trying to find my board here to see if there is nothing intrinsically relevant to this scenario, but in the meantime I have a question: what core are you trying to connect when the error happens? On a device without code running, you should always try first to connect to the master Cortex A8 core. Something mentioned in the reference below:

    processors.wiki.ti.com/.../GSG:Connecting_to_slave_cores_in_SoC_devices_v5

    If there is no Linux running on the A8 core, you should be able to connect to it - otherwise, you will have to be sure the kernel is not powering down the debug subsystem (it used to be quite common in the DM814x/DM816x EZSDK software distributions).

    If you are not running any code you can try to inspect the status of the cores by following the steps in section 3 of the page above.

    Hope this helps,
    Rafael
  • After moving to Windows 7 CCS v8, I was able to connect to the target, execute the GEL file, ....

    There was no error encountered. So it must be something to do with CCS v7 on the Linux, etc ...

    Thanks for your  quick reply.