Port Connect on the F283x CPU Cycle Accurate Simulator

Riah

Hi,

I am trying to use Port Connect on the 28335 Simulator (address 0x0B00 - ADC result register) but I am getting this error:

TMS320F283XX_0: Error during port connect: feature not supported

Does that mean that Port Connect does not work at all with the 335 Simulator or is the address invalid or something else?

I have tried other addresses such as the McBSPA DRR (0x5000) but they also do not work.

I am using the default linker file: 28335_RAM_lnk.cmd, CCSv4 Version: 4.0.2.01003 and Code Generation Tools 5.2.3.

The Port Connect page (http://tiexpressdsp.com/index.php/Port_Connect) does not mention which simulators are supported and it appears that all address ranges should be valid.

Thanks

over 15 years ago

0 Manivannan E over 15 years ago

TI__Intellectual 2010 points

Hi,

Port connect is not supported on F28335 Simulator for all addresses. We don't have any plan in supporting port connect in F28335 simulator.

Currently port connect is supported on 6000 device simulator only. Will update the port connect wiki on supported simulators.

Regards,

Mani

0 Riah over 15 years ago in reply to Manivannan E

Prodigy 120 points

Hi Manivannan,

Thanks for the answer. What is then the best way to simulate measured data on either the F2833x or F2834x simulators or development boards. I have tried the cio functions fscanf() which accesses data on the PC over the JTAG emulator but it is EXTREMELY slow (maximum about 10Hz).

Thanks

Riah

0 Manivannan E over 15 years ago in reply to Riah

TI__Intellectual 2010 points

Hi Riah,

You could allocate the memory space in external memory and do a RAW load of the data. You can read data from the allocate memory via pointer. This method would be faster than fscanf() but limitation would be on the size of memory available on EVM. On Simulator memory allocation should be easy b\c all 32 bit addressable (4GB) locations are simulated.

regards,

Mani

0 Juergen41226 over 15 years ago in reply to Manivannan E

Prodigy 20 points

Hi,

when I tried to solve my port connect problems I just found your discussion about port connect. I'm still using CCS3.3

I'm trying to port connect the McBSP1 DRR of a C6713 via interface address 0x3400000. The result of the McBSP-read function is always 0x00000000.

Whats my fault? Is there any general problem with port connect under CCS 3.3? I remember that this worked properly under CCS2 !

Thanks in advance

Juergen

0 Manivannan E over 15 years ago in reply to Juergen41226

TI__Intellectual 2010 points

Hi Juergen,

I am able to reproduce the issue. I am debugging the issue; will get back to you when I have some updates.

regards,

Mani

0 Manivannan E over 15 years ago in reply to Manivannan E

TI__Intellectual 2010 points

Hi Juergen,

I have debugged the issue and it's a bug. Port connect is broken on following simulator - c6713, c6712, c6711, c6416,c6411, c6412, c6415 device simulator in CCSv3.3 SR 12

We are working to fix it & I have filed a bug ID: SDSCM00035040.

You can check the status of bug - https://cqweb.ext.ti.com/pages/sdo-web.html

regards,

Mani

0 Manivannan E over 15 years ago in reply to Manivannan E

TI__Intellectual 2010 points

Hi Juergen,

I have managed to find a workaround for this bug. If you use port connect & access DXR & DRR register via DMA then you will receive correct data. We have supported port connect to data region of McBSP accessed via DMA only but did not support port connect when accessed via CPU to the memory mapped register DXR & DRR.

we are trying to fix the bug soon & the fix will be available in CCSv4 updates.

regards,

Mani

0 Juergen41226 over 15 years ago in reply to Manivannan E

Prodigy 20 points

Hi Manivannan,

if your workaround suggests that we have to change or code to support DMA it is clearly not our idea: It is our intention that our students should be able to prepare their projects on the simulator before they have access to the boards. So we wish to use (almost) the same code in the simulator as in the target hardware. Setting up the DMA will probably confuse our student beginners and change the timing behavior in the HW.

Another idea that I have in mind: If at least the external memory region 0x8000 0000-0xBfff f fff is correctly supported as stated in SPRU600H we could change the McBSP_read DRR-address in the assembly to access an external memory address that is not used in our application. So my question: Can you confirm that the external memory region doesn't also suffer from the same bug?

Another bad news for us is the fact that TI obviously does not intend to correct the bug in the CCS3.3 version.

regards

Juergen

0 Manivannan E over 15 years ago in reply to Juergen41226

TI__Intellectual 2010 points

Hi Juergen,

You can use external memory region 0x8000 0000-0xBfffffff for port connect and this region doesn't suffer from that bug. (I checked it)

By changing the DRR address I am not sure how the functionality of McBSP is affected. Secondly McBSP data region is usually accessed via DMA & DMA programming is done easily by our CSL library functions. More details on CSl - http://focus.ti.com/docs/toolsw/folders/print/sprc090.html and details on McBSP programming - http://focus.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=spru580g

About CCSv3.3, update are going come very slowly. I would recommend you to move to CCSv4 and you can get an upgrade if you have valid CCSv3.3 license. Secondly if you are using DSK or simulator in CCSv4 then it's completely free. For more details on CCSv4 - http://www.tiexpressdsp.com/index.php/Category:Code_Composer_Studio_v4

Regards,

Mani

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Port Connect on the F283x CPU Cycle Accurate Simulator