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Simulating known code - Data Verification error

Hello,

I'm trying to simulate a known code base.  I reversed engineered the make files and am trying to use a single project within Code Composer to compile, link, and simulate.  After many issues, I have been able get a fully linked application but cannot get the code to load properly into the simulator. 

Data verification failed at:.... 

I'm not sure that the linker command file and the GEL files are correct.

Is there a detailed document to get the simulator up and running properly?

Kim

P.S.  I have been able to simulate small test projects that I have created, but cannot get the product code to simulate.  BTW, I'm new to Code Composer.  Any pointers?

 

 

  • Kim Volz said:

    Data verification failed at:.... 

    I'm not sure that the linker command file and the GEL files are correct.

    That would be the first thing to check. Data verification errors are most common when there is a mismatch between your linker command file and your debugger memory map (check via 'Tools->Memory Map'). Your startup GEL file would most likely set up your debugger memory map

  • Helo Ki-Soo Lee,

    Thanks you for your help!!  I'm wondering about my install of Code Composer because I do not have a Memory Map within any pull-downs in the simulator.

    I did check the .cmd files compared to the GEL file.  The maps in the GEL file are larger but do cover the area within the .cmd file.  Does this account for the issue?  I will try to make them identical.

    Kim

     

  •  

    Opps, I had a oh-darn microsecond.

    Also, when I make the GEL file look like the .cmd file, which do I use, the LOAD values or the RUN values?

     

    Kim

     

  • Hi Kim,

    Actually, I should have asked this first - what version of CCS are you using?

  • Kim Volz said:
    Also, when I make the GEL file look like the .cmd file, which do I use, the LOAD values or the RUN values?

    Can you attach your GEL and linker command file to this thread?

  • Hello,

    The build uses two .cmd files (have Kim in the filename).  Attached are the files requested. 

    Code Composer Version: 3.3.28.2.

    Kim

    (phone number deleted)

    (e-mail address deleted)

    P.S.  If the files don't come through, please give me a call and we will figure out a different way for you to get the files.  -   Thanks for all your help!!

  • I see the GEL file. Could you attach you command file?

  • Attached is the first .cmd file.

     

  • Attached is the second .cmd file.

  • Looking at the gel file used, looks like there are some differences. For example all the memory ranges for IDM_S1 - IDM_S5 (defined as Internal Data memory) are at address locations that the GEL files defines as non-valid memory (anything after 0x04000000). So your .stack, .bss and some other sections are specified at invalid memory. The command files are very complex, they were written for a specific HW target and not for a simulator it seems. Are you sure your application can run on a 6701 simulator?

  • Hello Ki-Soo Lee,

    You are correct, these files are for a complex HW target.  I doubt that I will be able to use the 6701 development board but should be able to use the simulator.  The simulator should allow anything the processor allows. 

    As for the IDM_Sx, how do I get the GEL files to define the same address scheme as the .cmd files?

    Your help is VERY much appreciated!

     

    Kim

     

  • Ki-Soo Lee said:
    For example all the memory ranges for IDM_S1 - IDM_S5 (defined as Internal Data memory) are at address locations that the GEL files defines as non-valid memory (anything after 0x04000000). So your .stack, .bss and some other sections are specified at invalid memory. The command files are very complex, they were written for a specific HW target and not for a simulator it seems. Are you sure your application can run on a 6701 simulator?

    Kim Volz said:
    You are correct, these files are for a complex HW target.  I doubt that I will be able to use the 6701 development board but should be able to use the simulator.  The simulator should allow anything the processor allows. 
    I've highlighted a couple phrases in the quotes above for emphasis because I think they nail the issue down. The simulator should indeed allow anything that the processor itself can do (i.e., no external memory simulation, etc.). Take a look at the C670x Configuration Reference Guide on p8 which shows the memory map for the C6701 processor. You will see that the address range beginning at 0x04000000 is all reserved memory up until address 0x80000000. As such, the simulator knows that the hardware cannot use this address range as valid memory and thus fails to function as memory.

    You need to re-write the command files to use the actual memory ranges as specified in this document. Once all code and data are placed inside valid memory the verification errors should disappear.

  • Hello TimHarron,

    Thank you for the information.  I follow your logic.  I am now looking into the document that you referenced and will determine why the preceding SW engineers did what they did.  I'll get back to the Form with any additional information that I get.

    Thanks again,

    Kim

     

  • Hello,

    I would like to thank Ki-Soo Lee and TimHarron.  They helped me with my problem and I am now able to download the image into memory.

    The fix was to change the GEL file to allow downloads into internal memory space.  As indicated, the GEL and the .cmd files are complicated, but once in sync, they allow download.

     

    Thanks again!!

    Kim

     

  • Kim,

    Please refrain from posting your phone number and e-mail address in a public forum (send them as private messages instead), as spammers can use them.

    Regards,

    Rafael