CCS: Cache Analysis via Trace Analyzer in CCSv7 column names problem/clarification

Hi Nik,

Nik Trif said:

However, when I turn it on a Cache Event Profiler opens with three of the columns named "L1P Miss Hits L2 SRAM Total", "L1P Miss Hits L2 Cache Total" and "L1P Miss Hits External Total". The problem is that I chose to monitor L1D Cache when prompted, not L1P. Is this just a problem with column names, can I trust that it actually monitors L1D?

We can reproduce this. I assume it is just an issue with the name being off but I don't know for sure. A bug has been filed for this for the engineer to confirm and fix: CCDSK-2663

Nik Trif said:

Also, on this link: processors.wiki.ti.com/.../Real-Time_Hardware_Trace_and_Analysis It says that the cache analysis outputs the number of cache events in each function (exclusive only). Does this mean that I need to manually sum the cache events in functions and their sub-calls? Is there a way to get inclusive results?

Unlike the CCS Function Profiler, the HW Trace Analyzer only has exclusive counts.

Nik Trif said:

I know that number of cache events can be obtained through CCS Profiler but the problem is I can't run it when using target configurations for actual hardware and its DSP core. I, however, have a simulator which can do this but am concerned about the preciseness of that analysis as I'm not sure that the simulator matches my hardware.

I would recommend against using the simulator. While you can indeed collect a lot more data running the CCS function profiler on the C6x simulator, we unfortunately do not support the simulators anymore. I can't answer any questions regarding how accurate the simulation is compared to your actual HW target and I don't really have a resource to go to anymore who can answer it definitively.

Thanks

ki