Other Parts Discussed in Thread: AM3352
Tool/software: TI C/C++ Compiler
Per http://engold.ui.ac.ir/~nikmehr/Appendix_B1.pdf
I'm sure about CPU is in ARM mode. Why instruction is push rather than STM here?
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Tool/software: TI C/C++ Compiler
Per http://engold.ui.ac.ir/~nikmehr/Appendix_B1.pdf
I'm sure about CPU is in ARM mode. Why instruction is push rather than STM here?
Andy Lin94 said:I'm sure about CPU is in ARM mode.
I'm not. Please show, by copy-n-paste, all the build options used when you compiled DSPThread.c.
Thanks and regards,
-George
Sorry. I made a mistake. I should have asked for the build options for main.c I need to see the build options for the file that, once built, has the unexpected PUSH instruction. I'm not sure why I thought it was DSPThread.c .
Thanks and regards,
-George
I thought that by using your build options, I would be able to reproduce the problem. But I cannot. I always see a STMFD instruction, and not a PUSH. So ...
For the file main.c, please follow the directions in the article How to Submit a Compiler Test Case.
Thanks and regards,
-George
Thank you for the test case. I still do not see a PUSH instruction, but a STMFD. I suspect a bug in the disassembly display in CCS.
Because you use the option --c_src_interlist, the compiler keeps the auto-generated assembly file, and adds comments to it which make it easier to understand. This assembly file has the same name as the source file, with the extension changed to .asm. In a CCS build, it appears in the Debug directory (or whatever the current build configuration is named). For the function main, here are the first few instructions (the debug directives are omitted) ...
main: STMFD SP!, {A4, LR} ; [DPU_8_PIPE0] ;---------------------------------------------------------------------- ; 11563 | OS_ERR err = 0; ;---------------------------------------------------------------------- MOV V9, #0 ; [DPU_8_PIPE0] |11563| STR V9, [SP, #0] ; [DPU_8_PIPE1] |11563|
Compare this to the main.asm file you produced. Do you see the same instructions? If so, that confirms the problem is in the CCS disassembly display.
Thanks and regards,
-George
Here is mine.
main: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 STMFD SP!, {A4, LR} ; [DPU_8_PIPE0] .dwcfi cfa_offset, 8 .dwcfi save_reg_to_mem, 14, -4 .dwcfi save_reg_to_mem, 3, -8 $C$DW$18 .dwtag DW_TAG_variable, DW_AT_name("err") .dwattr $C$DW$18, DW_AT_TI_symbol_name("err") .dwattr $C$DW$18, DW_AT_type(*$C$DW$T$133) .dwattr $C$DW$18, DW_AT_location[DW_OP_breg13 0] .dwpsn file "../MCU/main.c",line 15,column 14,is_stmt,isa 2 ;---------------------------------------------------------------------- ; 15 | OS_ERR err = 0; ;----------------------------------------------------------------------
My CCS version is 8.2.0.00007. May you suggest me CCS version with least bug?
I had a look with a program compiled using TI ARM compiler v5.2.5 for a Cortex-A8 using --code_state=32 (i.e. ARM mode).George Mock said:Compare this to the main.asm file you produced. Do you see the same instructions? If so, that confirms the problem is in the CCS disassembly display.
The output of --c_src_interlist showed STMFD being used:
;***************************************************************************** ;* FUNCTION NAME: main * ;* * ;* Regs Modified : A1,A2,A3,A4,V9,SP,LR,SR * ;* Regs Used : A1,A2,A3,A4,V9,SP,LR,SR * ;* Local Frame Size : 0 Args + 0 Auto + 4 Save = 4 byte * ;***************************************************************************** main: ;* --------------------------------------------------------------------------* .dwcfi cfa_offset, 0 STMFD SP!, {A4, LR} ; [DPU_8_PIPE0] .dwcfi cfa_offset, 8 .dwcfi save_reg_to_mem, 14, -4 .dwcfi save_reg_to_mem, 3, -8 .dwpsn file "../hello.c",line 18,column 2,is_stmt,isa 2 ;---------------------------------------------------------------------- ; 18 | printf("Hello World!\n"); ;---------------------------------------------------------------------- ADR A1, $C$SL1 ; [DPU_8_PIPE0] |18| $C$DW$5 .dwtag DW_TAG_TI_branch .dwattr $C$DW$5, DW_AT_low_pc(0x00) .dwattr $C$DW$5, DW_AT_name("printf") .dwattr $C$DW$5, DW_AT_TI_call BL printf ; [DPU_8_PIPE1] |18| ; CALL OCCURS {printf } ; [] |18| .dwpsn file "../hello.c",line 20,column 2,is_stmt,isa 2 ;---------------------------------------------------------------------- ; 20 | return 0; ;---------------------------------------------------------------------- MOV A1, #0 ; [DPU_8_PIPE0] |20| .dwpsn file "../hello.c",line 21,column 1,is_stmt,isa 2 $C$DW$6 .dwtag DW_TAG_TI_branch .dwattr $C$DW$6, DW_AT_low_pc(0x00) .dwattr $C$DW$6, DW_AT_TI_return LDMFD SP!, {A4, PC} ; [DPU_8_PIPE1] .dwcfi cfa_offset, 0 ; BRANCH OCCURS ; []
Using ti-cgt-arm_5.2.5/bin/armdis to disassemble the generated .out file also showed STMFD being used:
40304f5c: main: 40304f5c: .arm 40304f5c: 08402DE9 STMFD R13!, {R3, R14} 40304f60: 08008FE2 ADD R0, PC, #8 40304f64: 06FEFFEB BL printf [0x40304784] 40304f68: 0000A0E3 MOV R0, #0 40304f6c: 0880BDE8 LDMFD R13!, {R3, PC}
Whereas the CCS 8.3.0.00009 disassembly view showed push being used:
The CCS status bar confirms the Cortex-A8 is in ARM mode, and changing the "Disassembly Mode" between "Mixed ARM/Thumb" or "ARM only" didn't make any difference. I.e. this confirms a problem with the CCS disassembly view.
Andy Lin94 said:By the way, how to set language to English as default language in ARM information Center?
I'm sorry I don't know the answer to this. It defaults to English for me.