Compiler/TMS320F28388D: sprintf() failed in c28 core

Andy Fung

Intellectual 875 points

Part Number: TMS320F28388D
Other Parts Discussed in Thread: C2000WARE

Tool/software: TI C/C++ Compiler

Tried to run code with sprintf() c28 core:

uint16_t tempBuf[50];

sprintf((char *)tempBuf, "(%.1f) ", 0.1);

Build the project successfully without warning. Stepped into the sprintf(), it failed in __TI_printfi() and jumped to Interrupt_illegalOperationHandler() then freezed.

In project properties, the "Level of printf" is set to "full". The stack size is 4k.

Need some advice. Thanks.

over 5 years ago

0 George Mock over 5 years ago

TI__Guru**** 244300 points

Try these two suggestions, in any order.

Formatting floating point numbers is one of the more complicated things sprintf does. Try to format an int.

Since ...

Andy Fung said:
The stack size is 4k.

... you probably are not overflowing the stack. But you might be running out of heap. Make the heap larger. Use the linker option --heap_size=number.

Please let me know what happens.

Thanks and regards,

-George

0 Andy Fung over 5 years ago in reply to George Mock

Intellectual 875 points

Hello George,

Increase the heap size to 0x1000. However, still having the same issue.

0 George Mock over 5 years ago in reply to Andy Fung

TI__Guru**** 244300 points

Can you format an int?

Thanks and regards,

-George

0 Andy Fung over 5 years ago in reply to George Mock

Intellectual 875 points

Hello George,

Yes. No problem with formatting an int but failed with float. I need to format a float.

Thanks,

0 Andy Fung over 5 years ago in reply to Andy Fung

Intellectual 875 points

I have no problem formatting a float on ARM core. So not sure what's wrong on the c28 core.

0 George Mock over 5 years ago in reply to Andy Fung

TI__Guru**** 244300 points

For the source file that calls sprintf, please follow the directions in the article How to Submit a Compiler Test Case. In addition, attach your linker command file to your next post. So the forum will accept it, please add the file extension .txt to it.

Thanks and regards,

-George

0 Andy Fung over 5 years ago in reply to George Mock

Intellectual 875 points

Hello George,

Please check the following attached. Thanks.

Building file: "../source.c"
Invoking: C2000 Compiler
"C:/ti/ccs930/ccs/tools/compiler/ti-cgt-c2000_18.12.4.LTS/bin/cl2000" -v28 -ml -mt --cla_support=cla2 --float_support=fpu64 --idiv_support=idiv0 --tmu_support=tmu0 --vcu_support=vcu0 -Ooff --fp_mode=relaxed --fp_reassoc=on --include_path="C:/VEKTREX_TFS/Vektrex/Trunk/SourceCode/ProductSource/WorkSpace_v9_1_28384D/i2c_ex2_eeprom" --include_path="C:/VEKTREX_TFS/Vektrex/Trunk/SourceCode/ProductSource/WorkSpace_v9_1_28384D/i2c_ex2_eeprom/device" --include_path="C:/ti/c2000/C2000Ware_2_01_00_00/driverlib/f2838x/driverlib" --include_path="C:/ti/ccs930/ccs/tools/compiler/ti-cgt-c2000_18.12.4.LTS/include" --advice:performance=all --define=DEBUG --define=CPU1 --printf_support=full --preproc_with_comment --preproc_with_compile --diag_suppress=10063 --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi "../source.c"
Finished building: "../source.c"

source.pp.txt

2838x_RAM_lnk_cpu1.cmd.txt

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MEMORY
{
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN            : origin = 0x000000, length = 0x000002
   BOOT_RSVD        : origin = 0x000002, length = 0x0001AE     /* Part of M0, BOOT rom will use this for stack */
   RAMM0            : origin = 0x0001B0, length = 0x000250
   RAMM1            : origin = 0x000400, length = 0x1000//0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD       : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMD0            : origin = 0x00C000, length = 0x000800
   RAMD1            : origin = 0x00C800, length = 0x000800
   RAMLS0           : origin = 0x008000, length = 0x002000
//   RAMLS1           : origin = 0x008800, length = 0x000800
//   RAMLS2           : origin = 0x009000, length = 0x000800
//   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x001800
//   RAMLS6           : origin = 0x00B000, length = 0x000800
//   RAMLS7           : origin = 0x00B800, length = 0x000800
   RAMGS0           : origin = 0x00D000, length = 0x001000
   RAMGS1           : origin = 0x00E000, length = 0x001000
   RAMGS2           : origin = 0x00F000, length = 0x008000
//   RAMGS3           : origin = 0x010000, length = 0x001000
//   RAMGS4           : origin = 0x011000, length = 0x001000
//   RAMGS5           : origin = 0x012000, length = 0x001000
//   RAMGS6           : origin = 0x013000, length = 0x001000
//   RAMGS7           : origin = 0x014000, length = 0x001000
//   RAMGS8           : origin = 0x015000, length = 0x001000
//   RAMGS9           : origin = 0x016000, length = 0x001000
   RAMGS10          : origin = 0x017000, length = 0x001000
   RAMGS11          : origin = 0x018000, length = 0x001000
   RAMGS12          : origin = 0x019000, length = 0x001000
   RAMGS13          : origin = 0x01A000, length = 0x001000
   RAMGS14          : origin = 0x01B000, length = 0x001000
   RAMGS15          : origin = 0x01C000, length = 0x000FF8
//   RAMGS15_RSVD     : origin = 0x01CFF8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   /* Flash sectors */
   FLASH0           : origin = 0x080000, length = 0x002000  /* on-chip Flash */
   FLASH1           : origin = 0x082000, length = 0x002000  /* on-chip Flash */
   FLASH2           : origin = 0x084000, length = 0x002000  /* on-chip Flash */
   FLASH3           : origin = 0x086000, length = 0x002000  /* on-chip Flash */
   FLASH4           : origin = 0x088000, length = 0x008000  /* on-chip Flash */
   FLASH5           : origin = 0x090000, length = 0x008000  /* on-chip Flash */
   FLASH6           : origin = 0x098000, length = 0x008000  /* on-chip Flash */
   FLASH7           : origin = 0x0A0000, length = 0x008000  /* on-chip Flash */
   FLASH8           : origin = 0x0A8000, length = 0x008000  /* on-chip Flash */
   FLASH9           : origin = 0x0B0000, length = 0x008000  /* on-chip Flash */
   FLASH10          : origin = 0x0B8000, length = 0x002000  /* on-chip Flash */
   FLASH11          : origin = 0x0BA000, length = 0x002000  /* on-chip Flash */
   FLASH12          : origin = 0x0BC000, length = 0x002000  /* on-chip Flash */
   FLASH13          : origin = 0x0BE000, length = 0x002000  /* on-chip Flash */
   CPU1TOCPU2RAM    : origin = 0x03A000, length = 0x000800
   CPU2TOCPU1RAM    : origin = 0x03B000, length = 0x000800
   CPUTOCMRAM       : origin = 0x039000, length = 0x000800
   CMTOCPURAM       : origin = 0x038000, length = 0x000800
   CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800
   RESET            : origin = 0x3FFFC0, length = 0x000002
}
SECTIONS
{
   codestart        : > BEGIN
   .text            : >> RAMGS2//RAMD0 | RAMD1 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

MEMORY
{
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN            : origin = 0x000000, length = 0x000002
   BOOT_RSVD        : origin = 0x000002, length = 0x0001AE     /* Part of M0, BOOT rom will use this for stack */
   RAMM0            : origin = 0x0001B0, length = 0x000250
   RAMM1            : origin = 0x000400, length = 0x1000//0x0003F8     /* on-chip RAM block M1 */
//   RAMM1_RSVD       : origin = 0x0007F8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RAMD0            : origin = 0x00C000, length = 0x000800
   RAMD1            : origin = 0x00C800, length = 0x000800
   RAMLS0           : origin = 0x008000, length = 0x002000
//   RAMLS1           : origin = 0x008800, length = 0x000800
//   RAMLS2           : origin = 0x009000, length = 0x000800
//   RAMLS3           : origin = 0x009800, length = 0x000800
   RAMLS4           : origin = 0x00A000, length = 0x000800
   RAMLS5           : origin = 0x00A800, length = 0x001800
//   RAMLS6           : origin = 0x00B000, length = 0x000800
//   RAMLS7           : origin = 0x00B800, length = 0x000800
   RAMGS0           : origin = 0x00D000, length = 0x001000
   RAMGS1           : origin = 0x00E000, length = 0x001000
   RAMGS2           : origin = 0x00F000, length = 0x008000
//   RAMGS3           : origin = 0x010000, length = 0x001000
//   RAMGS4           : origin = 0x011000, length = 0x001000
//   RAMGS5           : origin = 0x012000, length = 0x001000
//   RAMGS6           : origin = 0x013000, length = 0x001000
//   RAMGS7           : origin = 0x014000, length = 0x001000
//   RAMGS8           : origin = 0x015000, length = 0x001000
//   RAMGS9           : origin = 0x016000, length = 0x001000
   RAMGS10          : origin = 0x017000, length = 0x001000
   RAMGS11          : origin = 0x018000, length = 0x001000
   RAMGS12          : origin = 0x019000, length = 0x001000
   RAMGS13          : origin = 0x01A000, length = 0x001000
   RAMGS14          : origin = 0x01B000, length = 0x001000
   RAMGS15          : origin = 0x01C000, length = 0x000FF8
//   RAMGS15_RSVD     : origin = 0x01CFF8, length = 0x000008     /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   /* Flash sectors */
   FLASH0           : origin = 0x080000, length = 0x002000  /* on-chip Flash */
   FLASH1           : origin = 0x082000, length = 0x002000  /* on-chip Flash */
   FLASH2           : origin = 0x084000, length = 0x002000  /* on-chip Flash */
   FLASH3           : origin = 0x086000, length = 0x002000  /* on-chip Flash */
   FLASH4           : origin = 0x088000, length = 0x008000  /* on-chip Flash */
   FLASH5           : origin = 0x090000, length = 0x008000  /* on-chip Flash */
   FLASH6           : origin = 0x098000, length = 0x008000  /* on-chip Flash */
   FLASH7           : origin = 0x0A0000, length = 0x008000  /* on-chip Flash */
   FLASH8           : origin = 0x0A8000, length = 0x008000  /* on-chip Flash */
   FLASH9           : origin = 0x0B0000, length = 0x008000  /* on-chip Flash */
   FLASH10          : origin = 0x0B8000, length = 0x002000  /* on-chip Flash */
   FLASH11          : origin = 0x0BA000, length = 0x002000  /* on-chip Flash */
   FLASH12          : origin = 0x0BC000, length = 0x002000  /* on-chip Flash */
   FLASH13          : origin = 0x0BE000, length = 0x002000  /* on-chip Flash */
   CPU1TOCPU2RAM    : origin = 0x03A000, length = 0x000800
   CPU2TOCPU1RAM    : origin = 0x03B000, length = 0x000800

   CPUTOCMRAM       : origin = 0x039000, length = 0x000800
   CMTOCPURAM       : origin = 0x038000, length = 0x000800

   CANA_MSG_RAM     : origin = 0x049000, length = 0x000800
   CANB_MSG_RAM     : origin = 0x04B000, length = 0x000800
   RESET            : origin = 0x3FFFC0, length = 0x000002
}


SECTIONS
{
   codestart        : > BEGIN
   .text            : >> RAMGS2//RAMD0 | RAMD1 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3
   .cinit           : > RAMM0 | RAMGS2
   .switch          : > RAMM0 | RAMGS2
   .reset           : > RESET, TYPE = DSECT /* not used, */

   .stack           : > RAMM1
   .heap			: > RAMM1
#if defined(__TI_EABI__)
   .bss             : > RAMLS0 | RAMLS5 | RAMGS2
   .bss:output      : > RAMLS0 | RAMGS2
   .init_array      : > RAMM0 | RAMGS2
   .const           : > RAMLS5 | RAMGS2
   .data            : > RAMLS5 | RAMGS2
   .sysmem          : > RAMLS4 | RAMGS2
#else
   .pinit           : > RAMM0
   .ebss            : >> RAMLS5 //| RAMLS6
   .econst          : > RAMLS5
   .esysmem         : > RAMLS5
#endif

   ramgs0 : > RAMGS0, type=NOINIT
   ramgs1 : > RAMGS1, type=NOINIT

   MSGRAM_CPU1_TO_CPU2 > CPU1TOCPU2RAM, type=NOINIT
   MSGRAM_CPU2_TO_CPU1 > CPU2TOCPU1RAM, type=NOINIT
   MSGRAM_CPU_TO_CM   > CPUTOCMRAM, type=NOINIT
   MSGRAM_CM_TO_CPU   > CMTOCPURAM, type=NOINIT

	RAMLS5_VAR	> RAMLS5, type=NOINIT


   /* The following section definition are for SDFM examples */
//   Filter_RegsFile  : > RAMGS0
//   Filter1_RegsFile : > RAMGS1, fill=0x1111
//   Filter2_RegsFile : > RAMGS2, fill=0x2222
//   Filter3_RegsFile : > RAMGS3, fill=0x3333
//   Filter4_RegsFile : > RAMGS4, fill=0x4444
//   Difference_RegsFile : >RAMGS5, fill=0x3333

    .TI.ramfunc : {} > RAMGS2//RAMM0

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

0 Christopher Chiarella over 5 years ago in reply to Andy Fung

TI__Mastermind 30255 points

Hello

You're correct in allocating additional memory for stack and heap.

However, it looks you've only made that adjustment in CCS and not in the linker command file. Currently your stack and heap share 0x1000 words.

Update your linker command file to link the stack and heap sections to a larger memory section (maybe a RAMGSx).

Best regards

Chris

0 Andy Fung over 5 years ago in reply to Christopher Chiarella

Intellectual 875 points

Hello Chris,

I updated the stack and heap size in the linker command file. You could see that in my attached cmd file.

Thanks,

0 Christopher Chiarella over 5 years ago in reply to Andy Fung

TI__Mastermind 30255 points

Andy,

I don't see your attachment. Did this resolve your issue?

Best regards

Chris

0 Andy Fung over 5 years ago in reply to Christopher Chiarella

Intellectual 875 points

Hello Chris,

The attached file in the previous post on 4th Apr.

Thanks,

0 Christopher Chiarella over 5 years ago in reply to Andy Fung

TI__Mastermind 30255 points

Andy

Yes, I reviewed that linker. It is only allocating 0x1000 words to stack and heap (which they are sharing).

You need to update your linker command file to link the stack and heap sections to a larger memory section (maybe a RAMGSx).

Best regards

Chris

0 Andy Fung over 5 years ago in reply to Christopher Chiarella

Intellectual 875 points

Hello Chris,

I updated the cmd file like this:

Each of which has 0x1000. However, I am still having the same issue.

Thanks,

0 Christopher Chiarella over 5 years ago in reply to Andy Fung

TI__Mastermind 30255 points

Andy,

Not sure if this fixes the issue, it will be better to test with a combined section.

Similar to how RAMLS0 in your linker combines LS0 to LS3, I'd like you to combine either some RAMLSx or lower GS rams such RAMGS0/1/2 so that you have at least 0x2000 words. A stack and heap of 0x1000 each should be enough.

Assign this combined memory section to .heap and .stack to see if that fixes it.

Best regards

Chris

0 Andy Fung over 5 years ago in reply to Christopher Chiarella

Intellectual 875 points

Hello Chris,

I updated the cmd file as below and the sprintf is working now. The RAMLS0 is combined with RAMLS2 /RAMLS3 /RAMLS4 /RAMLS5

RAMLS0 : origin = 0x008000, length = 0x3000

.heap : > RAMLS0
.stack : > RAMLS0

I tried similar thing with RAMGSx. Combined RAMGS6 / RAMGS7 / RAMGS8 / RAMGS9 / RAMGS10 but it doesn't work. What is the reason of that?

Thanks

0 Christopher Chiarella over 5 years ago in reply to Andy Fung

TI__Mastermind 30255 points

Andy,

Great!

My guess on why that doesn't work is that the stack space is beyond the lower 64k words.

http://software-dl.ti.com/ccs/esd/documents/c2000_c28x-compiler-understanding-linking.html#types-of-compiler-sections

Best regards

Chris

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Compiler/TMS320F28388D: sprintf() failed in c28 core