Hi:
in the below equation(1) , how the 2V comes? isn't it 40V?
thanks
Zhang
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi:
in the below equation(1) , how the 2V comes? isn't it 40V?
thanks
Zhang
Hi Zhang,
Thanks for reaching out on tida-01573.
This equation is derived from i = C dv/dt for the current sourced from a capacitor for a defined period of time with a known capacitor voltage with respect to time.
The equation uses 2V and not 40V becuase, in the example for a 60A current pulse, we do not want the capacitor voltage to dip more than 5% of the 40V Vbus for a 1ns pulse. 5% of 40 is 2.
If we choose the capacitor value of 30nF based on this we can verify that the capacitor voltage will not dip more than 2V when sourcing the 60A during the first half of the pulse when the peak current is reached.
Let me know if this makes sense or you have any other questions.
Thanks,
Hi Jeff:
I now can understand why it's 2V instead of 40V.
The 30nF can support a peak current of 60A with the bus voltage of 40V for 1ns period? I am a little doubtful about it.
30nF capacitance is the minimum value required?
Please check the schematic TIDA-01573.schdoc.
How is the total capacitance of C2,C3,C6,C7,C8 and C9 calculated out? The total capacitance is 0.01+0.01+0.1+0.1+0.1+0.1=0.42uF.
is the total capacitance calculated out same as the equation for the 30nF?
Thanks,
Zhang
Hi Zhang,
Thanks, that's correct the total output cap is calculated with this equation. However the pulse width value used is longer and less % of dip as well.
Thanks,