Hello, everyone
I want to simulate the waveform of CMOS inverter, but the result is different from what I expect.
Why does the output always maintain high voltage?
Where's the problem in my circuit?
thank you
Hi Eddie,
Your PFET is upside-down:
The body should be tied to VDD. Basically you have a diode short from the supply to the output.
I revised the problem of PMOS, but the output doesn't change.
Does VDD short to the output?
Thank you
Hey Eddie,
Nevermind, I put together a matching simulation file. Your main issue is that your MOSFETs have thresholds above 3V. If you want to model low Vth MOSFETs, then you'll need to input a macro model for those.
I built the same circuit, but with a 10V supply and input signal:
-
To input your own MOSFET model, you can use a model file like this:
** Level 1 model for four port PFET .SUBCKT MYPFETCKT DP GP SP BP .MODEL myPfet NMOS(KP=100m, VT0=-0.65, LAMBDA=0.01) ** Mxx DRAIN GATE SOURCE SUBSTRATE MODELNAME MP DP GP SP BP myPfet .ENDS
And then import it with the "New Macro Wizard..." in the Tools menu (shortcut is Shift + Ctrl + M)
