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UCC38C40: UCC38C40 Flyback SMPS - Problems with load voltage regulation

Henrique Campos
Prodigy 50 points
Part Number: UCC38C40
Other Parts Discussed in Thread: UCC24630,

Tool/software:

Hello everyone,
I need help with the implementation of a power supply using UCC38C40DR. It is a SMPS with a DC input voltage from 60V to 400 V and an output voltage equal to 12V/4A (UCC38C40 plus UCC24630) and 5V/1A (TPS 563208). My circuit schematic:

- Flyback topology:

- UCC38C40:

- UCC 24630:


My feedback voltage in pin 2 (VFB) is approximately constant and equal to 2.505V with load variations. The problem is the output voltage (load terminals) that significantly changes about 0.5 V with load variations (from no-load to about 40 W). This voltage fall may be because the resistor divider reads the output voltage in the VFB pin (R63 and R64), but this strategy is suggested in the datasheet, so it was not supposed to happen. I have this problem with load voltage regulation.
Any comments or suggestions are welcomed.
Thanks in advance.

  • 0
    TI__Expert 7446 points

    Henrique, please see below my schematic review around UCC38C40:

    -VDD: I do not see a start resistor connected from input HV net to Vdd pin. This resistor is needed to start to start the device. Refer to section 8.2.2.9 for how to select and design this resistor. Make sure Cvdd cap is high enough (10uF in your case) to hold on the VDD voltage above UVLO_ON until the secondary side takes control through the aux winding. Check Section 9.2.2.8 of this Datasheet here for how to design this cap. The HF decoupling caps (100nF and 1nF) are good and they should be connected next to (VDD-GND) pins for good regulation.

    -VREF: Cvref value 1uF seems good. Make sure you connect this cap next to (VREF-GND) pins for good regulation.

    -RT/CT: RT and CT values will get a fsw~100KHz.

    -COMP: Feedback compensation network (Rcomp//Ccomp) looks good. Soft start looks good too.

    -VFB: You are using a Flyback converter, which requires isolation. However, the control stage does not provide any isolation as you are connecting the FB voltage directly from Vout through a voltage divider. An optocoupler is recommended to provide isolation through primary and secondary control circuits and to provide enough FB current/voltage at the FB pin of the controller. If you do not want to use an opto-coupler, you can do Primary side regulation through the Aux winding of the transformer connecting a voltage divider resistors after the diode rectifier. Please, refer to this reference design for a good example and design Reference Design.

    -Isense: Verify the current sense resistor value in the 8.2.2.5 section of Datasheet here. Rcs and Ccs filter components should be design so that it helps attenuating the on-spikes coming from parasitic. I recommend decreasing Ccs to 100pF and. 470pF is very high and it might interfere with the fundamental harmonics of primary current waveform (100KHz).

    -DRV/OUT: 10ohm value looks good.

    Additional questions: Why is R32 in series with V4 connected in parallel with the switching node? Is it a snubber circuit? Also, for support with UCC24630 please submit a different E2E thread with that part number.

    Please, check my comments above, specially the start resistor, the Cvdd capacitor vaue and the feedback connection and verify the converter again.

    Thank you