Hi Team BLE,
lately we integrated the CC2651R3SIPA to our system, we started testing the module and our first results from the RSSI test have shown us a (+/-) -20dbm differences between the LP-CC2651R3SIPA to our device integrate the CC2651R3SIPA.
I want to mention that our board is an 8 layers board, we tried to implement all the layout recommendation from the CC2651R3SIPA datasheet.
The FW on our device was built on a TI’s FW template, so the basis of the FW in the LP-CC2651R3SIPA, and the CC2651R3SIPA integrated in our system is the same.
Is there anything in FW side that we can do to make the RSSI result better?
In addition, I added 2 pictures from our CC2651R3SIPA layout, this is a high-level look of the CC2651R3SIPA layout in our board, this is 8 layers shown at once so you can see what is on the TOP and bottom and in between, regarding the distances as shown in the datasheet, the spaces in the picture are not the same but was got close as much as we could.
Another picture is the CC2651R3SIPA's schematic design.
