ESD Pulse Lock-up

Hi Chad,

Can you send your schematic and layout to me ?

Regards,

   Richard

I've included a few images below - I can send different formats / better quality if you tell me where to send to. Any other general layout tips or anything else you notice would be helpful. Thanks

Sorry the images weren't labeled - the bottom image is the top copper layer, and the upper layout image is the bottom copper layer. I've removed our 'top secret' stuff from the schematic, and the photo shows the thermistor sticking up near the middle of the photo

I contacted one of our system ESD experts and he has some questions:

1.      - At what ESD voltage level are they failing?

3.       - What ESD voltage level do they need to pass?

4.       - Is lock-up only failure mode?

5.       - Can the system recover after lock-up?

6.       - If yes, how? Power cycle or reset?

7.     - Do you have the possibility to do indirect ESD testing: ESD strikes to a large metal object (such as a big metal plate) close to the system and monitor failure. The ESD gun is not actually touching the thermistor.

1. So far all of the lock-ups have occurred by just touching the thermistor with a metal object in my hand and after moving in my chair or walking on carpet. The pulses go off the screen on my scope, so it's over 500v, but I'm guessing less than 1,000v (so pretty small pulses). There's about a 5ns rise time, ~20ns duration, followed by a lot of ringing pulses. 

2. We'll need to pass a 10kV pulse at UL. 

3. Lock-up is not the only failure mode. Sometimes the board reset, sometimes a few I/O lines are toggled, and sometimes it seems like the processor or clock runs at 1/2 speed (light flashes and delay loops take twice as long).

4. A power cycle or reset always clears the fault and the board works fine until the next ESD pulse.

5. I'm in the process of renting an ESD gun, so we can do more controlled testing. I'll try the indirect test you describe.

Let me know if any of this makes sense or if there's any general tips for preventing this. Thanks,

Chad C.

I had a similar problem with the CC1110. It turned out to be a very sensitive reset line. A small cap to ground, like .001 and a 1k resistor to the programming header alleviated it. Even touching another part of the board did it. This is addressed in the app notes, and I did not examine your schematics to see if it is implemented.

The original layout file could help us to see better how the ground metals are connected each other.

While waiting for indirect ESD testing results, here is another suggestion for a quick testing.

- Add a capacitor on the crystal trace as shown below and monitor if this modification provides any improvement during ESD testing.

This is not an easy soldering job as you need to add a cap on a trace without shorting it to the nearby ground metal. However it will provide important information about the PCB layout design around the crystal. 

Thanks.

Jae P

I added the capacitor as you show it and removed my old capacitor, and it did seem to improve the ESD performance, but not completely resolve the problem. I then lifted the oscillator up and ran a separate (and shorter) wire directly to the cap you show and eliminated my PCB trace that had some vias and a long path. It looks like with this jumper wire and new cap location, the problem has gone away. 

I haven't gotten the ESD gun yet, so I still need to do a lot more rigorous testing, but at least my 'walking on carpet and touching' test doesn't cause this modified board to lock up, while it still causes unmodified boards to lock up.

I'm guessing this is coming down to poor layout / routing on my part.

Thank you for the responses and advice, it really helps out! Let me know if you have any other advice or layout tips -

Chad C. 

Good news!

I think the long trace around the crystal and placement of the capacitors are the key issues in this case.

Again we will need your original layout file for more detailed PCB layout analysis including grounding scheme.

Let us know if you get more data from ESD gun testing.

Thank you. 

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