CC2340R5: line-break generation

Hello Russell Minnich,

I hope you are doing well. I believe the implementation of the Line Break is automatic, (IE detects if the data line was held at a logic 0 for too long):

"The receive logic performs serial-to-parallel conversion on the received bit stream after a valid start pulse is detected. Overrun, parity, frame error checking, and line-break detection are also performed, and their status accompanies the data written to the RX FIFO"

However, I am a bit unsure what "line-break generation" does in context of our UART driver (*not sure if we can control this or if its automatic, "line-break" is not referenced anywhere in our SDK other than the documentation). 

Thanks,
Alex F

I didn't see anything in the driver either.

I found the following in the user guide in section 19.6.7.

UART Send Break
If this bit is set to 1, a low-level is continually output on the UARTTXD output pin, after completing transmission of the current character. For the proper execution of the break command, the
software must set this bit for at least two complete frames. For normal use, this bit must be cleared to 0.

It looks like I need to manually control the register after a transmit.  I didn't find support in the SDK.  But also not sure how to keep it immediately following a blocking (or uninterrupted DMA) write.

Hello Russel,

To maybe get some lower level control of the UART we may need to use the DMA, though I am going to try to reach out to the drivers team about how to set the UART to "software must set this bit for at least two complete frames".

Thanks,
Alex F

I thought UART2_write() in blocking mode used DMA (it calls UART2_writeTimeoutBlocking() eventually).  After DMA completes, the UART Send Break is set low for the duration of 2 frames at the configured baud rate.  The driver code could be updated to place it after DMA completes, but before it unblocks.

Hello Russell,

I also looked internally for our UART and found a reference to "break" here:

Error: The error interrupt is asserted when an error occurs in the reception of data by the UART. The interrupt can be caused by a number of different error conditions:
– framing
– parity
– break
– overrun

And it is also noted that the UART interrupt can be configured when a "break" is noticed, this may be what line-break was referring too. 

Thanks,
Alex F

I believe that's rx only.  line break generation would be tx, but can be used to aid the rx side.  Clarification would be great.

Hello Russell,

I have reached out to the internal team to see if they can help us on the line break questions.

Thanks,
Alex F

Hello Russell,

As of today I have not received an update from the team, I will let you know as soon as I hear back.

Thanks,
Alex F