CC2538: SW DMA

Hi Raghunandana DS,

Give me 1-2 days to set up the hardware and software so that I can replicate your situation and figure out what the issue is.

In the meantime, try modifying only the declaration of your buffers as:

unsigned char SourceBuffer[17];

unsigned char DestBuffer[17];

(Note: Do not modify your for loop at all. Only change the buffer sizes to 17).

I am working on an explanation as to why changing the buffer sizes from 16 to 17 works.

Regards,

Toby

Raghunandana DS,

I’m glad the previous issue is resolved.

Is there a specific peripheral (ADC, UART, timers, etc) that you would like to use DMA with?

There is an example for setting up a peripheral for simple transmit on the link (starts on pg 303): http://www.ti.com/lit/ug/swru319c/swru319c.pdf

Also, the documentation of the uDMA API is on the link (starts on pg 174) http://www.ti.com/lit/ug/swru325a/swru325a.pdf

Toby

There is UART example in CC2538 foundation firmware.

Hi Toby,

I had defined uDMAIntHandler() and called the IntEnable(IntUDMA); but not getting interrupt .

Please look at my code.

#include <stdbool.h>
#include <stdint.h>
#include "hw_memmap.h"
#include "hw_ints.h"
#include "hw_flash_ctrl.h"
#include "flash.h"
#include "gpio.h"
#include "hw_ioc.h"
#include "ioc.h"
#include "interrupt.h"
#include "sys_ctrl.h"
#include "udma.h"
#include "cpu.h"
#include "uartstdio.h"
#include "string.h"
#include "uart.h"
#include "debug.h"


//*****************************************************************************
// NOTE:
// This example has been run on a SmartRF06 evaluation board.  
//
//*****************************************************************************
//
//! \addtogroup dma_examples_list
//! <h1>uDMA Flash Transaction (dma_flash)</h1>
//!
//! This example shows how to set up the uDMA controller to perform a 
//! peripheral-initiated SRAM-to-flash transfer.
//!
//! This example uses the following peripherals and I/O signals.  You must
//! review these and change as needed for your own board:
//! - NONE
//*****************************************************************************

#define PAGE_SIZE                2048
#define PAGE_TO_ERASE            14
#define PAGE_TO_ERASE_START_ADDR (FLASH_BASE + (PAGE_TO_ERASE * PAGE_SIZE))

//*****************************************************************************
//
// The application must allocate the channel control table.
// This one is a full table for all modes and channels.
// NOTE: This table must be 1024-byte aligned.
//
//*****************************************************************************
#if defined(__IAR_SYSTEMS_ICC__)
#pragma data_alignment=1024
unsigned char ucDMAControlTable[1024];
#else
unsigned char ucDMAControlTable[1024] __attribute__ ((aligned(1024)));
#endif

//*****************************************************************************
//
// Source buffer used for the DMA transfer.
//
//*****************************************************************************
static uint32_t ucSourceBuffer[16];
static uint32_t ucDestinationBuffer[16];

//*****************************************************************************
//
// ISR called when uDMA software transfer is done.
// The function will compare the two buffers and report if move was done.
//
//*****************************************************************************
void 
uDMAIntHandler(void)
{
    uint32_t IntStat = uDMAIntStatus();
    printf("IntStat = %d\n", IntStat);
    uDMAIntClear(IntStat);
}

//*****************************************************************************
//
// Main function, setup DMA and perform flash write. Verify the transaction.
//
//*****************************************************************************
int
main(void)
{
    uint16_t i;
    int32_t i32Res;

    // Set the clocking to run directly from the external crystal/oscillator.
    // (no ext 32k osc, no internal osc)
    SysCtrlClockSet(false, false, SYS_CTRL_SYSDIV_32MHZ);

    // Set IO clock to the same as system clock //
    SysCtrlIOClockSet(SYS_CTRL_SYSDIV_32MHZ);

    // Erase Flash page that will hold our transferred data //
    i32Res = FlashMainPageErase(PAGE_TO_ERASE_START_ADDR);
    ASSERT(i32Res==0);

    // Fill Source buffer (to be copied to flash) with some data //
    for(i=0; i<16; i++)
    {
        ucSourceBuffer[i] = 'A' + (i % 26);
    }
    
    ucDestinationBuffer[16] = 0;
    
    // Enable the uDMA controller.//
    uDMAEnable();
    
    // Init Copying Data from RAM to Flash //
    
    // Disable the uDMA channel to be used, before modifications are done.//
    uDMAChannelDisable(UDMA_CH2_FLASH);

    // Set the base for the channel control table.//
    uDMAControlBaseSet(&ucDMAControlTable[0]);

    // Assign the DMA channel //
    uDMAChannelAssign(UDMA_CH2_FLASH);

    // Set attributes for the channel.//
    uDMAChannelAttributeDisable(UDMA_CH2_FLASH, UDMA_ATTR_HIGH_PRIORITY);

    // Now set up the characteristics of the transfer.
    // 32-bit data size, with source increments in words (32 bits), 
    // no destination increment.
    // A bus arbitration size of 1 must be used.
    uDMAChannelControlSet(UDMA_CH2_FLASH, UDMA_SIZE_32 | UDMA_SRC_INC_32 |
                          UDMA_DST_INC_NONE | UDMA_ARB_1);

    // Set transfer parameters. 
    // Source address is the location of the data to write
    // and destination address is the FLASH_CTRL_FWDATA register.
    uDMAChannelTransferSet(UDMA_CH2_FLASH, UDMA_MODE_BASIC, ucSourceBuffer, 
                           (void *) FLASH_CTRL_FWDATA, sizeof(ucSourceBuffer));
    //
    // Enable Interrupt for DMA
    //
    IntEnable(INT_UDMA);

    // Asure that the flash controller is not busy.
    while(HWREG(FLASH_CTRL_FCTL) & FLASH_CTRL_FCTL_BUSY)
    {
    }

    // Initialize Flash control register without changing the cache mode.
    HWREG(FLASH_CTRL_FCTL) &= FLASH_CTRL_FCTL_CM_M;

    // Setup Flash Address register to address of first data word (32-bit)
    HWREG(FLASH_CTRL_FADDR) = PAGE_TO_ERASE_START_ADDR;

    // Finally, the DMA channel must be enabled.
    uDMAChannelEnable(UDMA_CH2_FLASH);

    // Set FCTL.WRITE, to trigger flash write
    //
    HWREG(FLASH_CTRL_FCTL) |= FLASH_CTRL_FCTL_WRITE;

    // Wait until all words has been programmed. //
    while( HWREG(FLASH_CTRL_FCTL) & FLASH_CTRL_FCTL_FULL )
    {
    }
 
    // Check if flash write was successfull //
    if (HWREG(FLASH_CTRL_FCTL) & FLASH_CTRL_FCTL_ABORT)
    {
        printf("Write to Flash not successful!\n");
    }
    else
    {
        printf("Write to Flash success!\n");
    }

    // Set control register back to reset value without changing the cache mode. //
    HWREG(FLASH_CTRL_FCTL) &= FLASH_CTRL_FCTL_CM_M;

    // Compare source buffer and destination flash page //
    if(memcmp(ucSourceBuffer, (void*) PAGE_TO_ERASE_START_ADDR, 256)==0)
    {
        printf("Success!\n");
    }
    else
    {
        printf("Not Success!\n");
    }

    memcpy(ucDestinationBuffer, (void*) PAGE_TO_ERASE_START_ADDR, 256);
    for(int i=0; i<16; i++){
    printf("%c", ucDestinationBuffer[i]);
    }
    printf("\n");
    // End Copying Data from RAM to Flash //

    // We are done, loop forever //
    while(1)
    {
    }
}

Thank you.

Raghunandana DS,

First, I recommend that you don’t write to ucDestinationBuffer[16]. Please either declare the buffer with size 17 (and you can write to [16]), or leave it size 16 but don’t write to [16]. If you declare an array with size 16, you can access elements 0 to 15 (inclusive). Even though in your current code it won’t cause bugs, in general writing outside the bounds of your array could cause you headache later.

One question I have for you: is the flash uDMA write successful?

So actually, after reading the reading swru319c.pdf (pg 304), I stand corrected. You should be using the interrupt handler for the peripheral itself (in our case, use FlashIntHandler instead of uDMAIntHandler). So you would replace IntEnable(INT_UDMA) with IntEnable(INT_FLASH). You would rename your uDMAIntHandler to FlashIntHandler.

You may also need to include IntMasterEnable().

Let me know if this works. I expect that the FlashIntHandler will be called after the transfer is complete.

Regards,

Toby

Raghunandana DS,

The uDMAIntHandler is triggered by completion of a software request DMA (from one buffer to another). According to the documentation, the uDMA controller generates an interrupt on the peripheral’s interrupt (if you are using uDMA with peripheral).

My understanding is the following:

Suppose an application has multiple requests to use uDMA. For example, it may request uDMA for UART, flash, SSI, etc. What happens when one transfer is complete? If you use the same interrupt (uDMAIntHandler) for all kinds of uDMA transfers, then how can the application know which uDMA transfer is actually complete? For example, if UART uDMA transfer is done, and if the uDMAIntHandler is called, how do you know whether UART, flash, or SSI is the uDMA transfer that has completed? That’s why the uDMA will trigger the appropriate interrupt (either UART, flash, or SSI interrupts).

However, for software uDMA requests (for buffer to buffer transfer) completion, the application needs to know what kind of interrupt was triggered. For example, the application could be interrupted by a GPIO edge or timer. If the software uDMA interrupt is triggered, then uDMAIntHandler is called (and thus the application is assured that the interrupt was caused by uDMA and not, say, GPIO).

Regards,

Toby

Raghunandana DS,

As YK Chen mentioned, please refer to UART example given in the foundation firmware (uart_polled.c).

Initialize the uDMA controller as in the previous examples. Use the appropriate UART uDMA channels (use the uDMA channel assignment table in swru319c.pdf and the channel #define in udma.h). Additionally, use the UARTDMAEnable function.

Using the example, I recommend that you prepare a buffer of characters, then use uDMA to write these characters to UART tx.

Regards,

Toby

Hi Toby,

I made as you and YK Chen told, but my code is sops in between can you please look at my code,

#include "hw_memmap.h"
#include "hw_types.h"
#include "hw_ioc.h"
#include "sys_ctrl.h"
#include "uart.h"
#include "gpio.h"
#include "ioc.h"

#include "udma.h"
#include "hw_uart.h"


#define EXAMPLE_PIN_UART_RXD            GPIO_PIN_0 
#define EXAMPLE_PIN_UART_TXD            GPIO_PIN_1 
#define EXAMPLE_GPIO_BASE               GPIO_A_BASE

static uint32_t ucSourceBuffer[16];
    
    #pragma data_alignment=1024
    unsigned char ucDMAControlTable[1024];
      
//*****************************************************************************
//
// Configure the UART and perform reads and writes using polled I/O.
//
//*****************************************************************************
int
main(void)
{
    char cThisChar;

    //
    // Set the clocking to run directly from the external crystal/oscillator.
    // (no ext 32k osc, no internal osc)
    //
    SysCtrlClockSet(false, false, SYS_CTRL_SYSDIV_32MHZ);

    //
    // Set IO clock to the same as system clock
    //
    SysCtrlIOClockSet(SYS_CTRL_SYSDIV_32MHZ);
   
    //
    // Enable UART peripheral module
    //
    SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_UART0);

    
    
      for(int i=0; i<16; i++)
    {
        ucSourceBuffer[i] = 'A' + (i % 26);
    }
    
    
    
    //
    // Disable UART function
    //
    UARTDisable(UART0_BASE);

    //
    // Disable all UART module interrupts
    //
    UARTIntDisable(UART0_BASE, 0x1FFF);

    //
    // Set IO clock as UART clock source
    //
    UARTClockSourceSet(UART0_BASE, UART_CLOCK_PIOSC);

    //
    // Map UART signals to the correct GPIO pins and configure them as
    // hardware controlled.
    //
    IOCPinConfigPeriphOutput(EXAMPLE_GPIO_BASE, EXAMPLE_PIN_UART_TXD, IOC_MUX_OUT_SEL_UART0_TXD);
    GPIOPinTypeUARTOutput(EXAMPLE_GPIO_BASE, EXAMPLE_PIN_UART_TXD); 
    IOCPinConfigPeriphInput(EXAMPLE_GPIO_BASE, EXAMPLE_PIN_UART_RXD, IOC_UARTRXD_UART0);
    GPIOPinTypeUARTInput(EXAMPLE_GPIO_BASE, EXAMPLE_PIN_UART_RXD);
     
    //
    // Configure the UART for 115,200, 8-N-1 operation.
    // This function uses SysCtrlClockGet() to get the system clock
    // frequency.  This could be also be a variable or hard coded value
    // instead of a function call.
    //
    UARTConfigSetExpClk(UART0_BASE, SysCtrlClockGet(), 115200,
                        (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
                         UART_CONFIG_PAR_NONE));
//    UARTEnable(UART0_BASE);
    
  
    // Enable the uDMA controller.//
    uDMAEnable();
    
    UARTDMAEnable(UART0_BASE, UART_DMA_RX);

    // Init Copying Data from RAM to Flash //
    
    // Disable the uDMA channel to be used, before modifications are done.//
    uDMAChannelDisable(UDMA_CH9_UART0TX);

    // Set the base for the channel control table.//
    uDMAControlBaseSet(&ucDMAControlTable[0]);

    // Assign the DMA channel //
    uDMAChannelAssign(UDMA_CH9_UART0TX);

    // Set attributes for the channel.//
    uDMAChannelAttributeDisable(UDMA_CH9_UART0TX, UDMA_ATTR_HIGH_PRIORITY);


    // Now set up the characteristics of the transfer.
    // 32-bit data size, with source increments in words (32 bits), 
    // no destination increment.
    // A bus arbitration size of 1 must be used.
    uDMAChannelControlSet(UDMA_CH9_UART0TX, UDMA_SIZE_32 | UDMA_SRC_INC_32 |
                          UDMA_DST_INC_NONE | UDMA_ARB_1);


    // Set transfer parameters. 
    // Source address is the location of the data to write
    // and destination address is the FLASH_CTRL_FWDATA register.
    uDMAChannelTransferSet(UDMA_CH9_UART0TX, UDMA_MODE_BASIC, ucSourceBuffer, 
                           (void *) UART_O_DMACTL, sizeof(ucSourceBuffer));
    
    
   // Stops Here
    
   
    
   
    //
    // Enter an infinite loop.
    //
    while(1)
    {
    }    
}

It's transmitting nothing to UART, And Stop at the last step.

Thank you