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CC2640R2F : How to enable Cache as RAM after adding Off-chip OAD into Multi-role default example

Part Number: CC2640R2F
Other Parts Discussed in Thread: CC2650

Hello All,

I added off-chip OAD into CC2640R2F's Multi-role example of BLE SDK v2.20.00.49 by following instructions of SimpleLink Academy's Enhanced OAD section. However, I needed to enable Cache as RAM to increase MAX_NUM_BLE_CONNS. I expect that somebody can ask same question so that I post this on E2E.

What do I need to change in default cc26xx_app_oad,cmd? It seems that linker command file isn't suitable with Cache as RAM.

Building target: "multi_role_cc2640r2lp_app.out"
Invoking: ARM Linker
"C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.2.LTS/bin/armcl" --cmd_file="C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/config/build_components.opt" --cmd_file="C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/config/factory_config.opt" --cmd_file="C:/ti/OAD_multi_role_CC2640R2F/multi_role_cc2640r2lp_stack_library/TOOLS/build_config.opt" --cmd_file="C:/ti/OAD_multi_role_CC2640R2F/multi_role_cc2640r2lp_stack_library/TOOLS/ccs_compiler_defines.bcfg" -mv7M3 --code_state=16 -me -O4 --opt_for_speed=0 --define=DeviceFamily_CC26X0R2 --define=BOARD_DISPLAY_USE_LCD=0 --define=BOARD_DISPLAY_USE_UART=1 --define=BOARD_DISPLAY_USE_UART_ANSI=1 --define=CACHE_AS_RAM --define=CC2640R2_LAUNCHXL --define=CC26XX --define=CC26XX_R2 --define=ICALL_EVENTS --define=ICALL_JT --define=ICALL_LITE --define=ICALL_MAX_NUM_ENTITIES=6 --define=ICALL_MAX_NUM_TASKS=3 --define=ICALL_STACK0_ADDR --define=MAX_NUM_BLE_CONNS=4 --define=POWER_SAVING --define=TBM_ACTIVE_ITEMS_ONLY --define=USE_ICALL --define=MAX_PDU_SIZE=251 --define=SPLIT_APP_STACK_IMAGE --define=xdc_runtime_Assert_DISABLE_ALL --define=xdc_runtime_Log_DISABLE_ALL -g --c99 --gcc --diag_warning=225 --diag_wrap=off --display_error_number --gen_func_subsections=on --abi=eabi -z -m"multi_role_cc2640r2lp_app.map" --heap_size=0 --stack_size=256 -i"C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.2.LTS/lib" -i"C:/ti/ccsv8/tools/compiler/ti-cgt-arm_18.1.2.LTS/include" --reread_libs --define=CC26X0ROM=2 --define=CACHE_AS_RAM=1 --define=OAD_IMG_E=1 --diag_suppress=16002-D --diag_suppress=10247-D --diag_suppress=10325-D --diag_suppress=10229-D --diag_suppress=16032-D --diag_suppress=10068-D --diag_wrap=off --display_error_number --warn_sections --xml_link_info="multi_role_cc2640r2lp_app_linkInfo.xml" --rom_model -o "multi_role_cc2640r2lp_app.out" "./Application/bim_util.obj" "./Application/board_key.obj" "./Application/hal_assert.obj" "./Application/multi_role.obj" "./Application/multi_role_menu.obj" "./Application/two_btn_menu.obj" "./Application/util.obj" "./Drivers/ECC/ECCROMCC26XX.obj" "./Drivers/RF/RFCC26XX_singleMode.obj" "./Drivers/TRNG/TRNGCC26XX.obj" "./ICall/icall.obj" "./ICall/icall_cc2650.obj" "./ICall/icall_user_config.obj" "./ICallBLE/ble_user_config.obj" "./ICallBLE/icall_api_lite.obj" "./Middleware/extflash/ExtFlash.obj" "./OAD/crc32.obj" "./OAD/flash_interface_ext_rtos.obj" "./OAD/oad.obj" "./OAD/oad_image_header_app.obj" "./OAD/oad_util.obj" "./PROFILES/devinfoservice.obj" "./PROFILES/gatt_uuid.obj" "./PROFILES/gattservapp_util.obj" "./PROFILES/multi.obj" "./PROFILES/simple_gatt_profile.obj" "./Startup/board.obj" "./Startup/find_stack_entry.obj" "./Startup/main.obj" -l"configPkg/linker.cmd" -l"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/devices/cc26x0r2/driverlib/bin/ccs/driverlib.lib" -l"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/kernel/tirtos/packages/ti/dpl/lib/dpl_cc26x0r2.aem3" -l"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/drivers/lib/drivers_cc26x0r2.aem3" -l"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/display/lib/display.aem3" -l"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/grlib/lib/ccs/m3/grlib.a" -l"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/rom/ble_rom_releases/cc26xx_r2/Final_Release/common_r2.symbols" -l"C:/ti/OAD_multi_role_CC2640R2F/multi_role_cc2640r2lp_stack_library/TOOLS/ccs_linker_defines.cmd" -l"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/common/cc26xx/ccs/cc26xx_app_oad.cmd" -llibc.a
<Linking>
"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/common/cc26xx/ccs/cc26xx_app_oad.cmd", line 343: warning #10190-D: absolute symbol "heapStart" being redefined
"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/common/cc26xx/ccs/cc26xx_app_oad.cmd", line 343: warning #10190-D: absolute symbol "heapStart" being redefined
"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/common/cc26xx/ccs/cc26xx_app_oad.cmd", line 348: warning #10097: memory range not found: GPRAM on page 0
"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/common/cc26xx/ccs/cc26xx_app_oad.cmd", line 345: error #10265: no valid memory range(null) available for placement of ".bss"
"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/common/cc26xx/ccs/cc26xx_app_oad.cmd", line 345: error #10099-D: program will not fit into available memory. run placement with alignment fails for section ".bss" size 0xb59
"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/common/cc26xx/ccs/cc26xx_app_oad.cmd", line 348: warning #10097: memory range not found: GPRAM on page 0
error #10099-D: program will not fit into available memory. run placement with alignment fails for section ".TI.noinit" size 0
"C:/ti/simplelink_cc2640r2_sdk_2_20_00_49/source/ti/blestack/common/cc26xx/ccs/cc26xx_app_oad.cmd", line 343: warning #10190-D: absolute symbol "heapStart" being redefined
error #10010: errors encountered during linking; "multi_role_cc2640r2lp_app.out" not built

>> Compilation failure
makefile:199: recipe for target 'multi_role_cc2640r2lp_app.out' failed
gmake[1]: *** [multi_role_cc2640r2lp_app.out] Error 1
makefile:192: recipe for target 'all' failed
gmake: *** [all] Error 2

**** Build Finished ****

Best regards,
Richard Park

  • Hi Richard,

    I created this lab and actually had intended to add a section on using cache as RAM with OAD. However, there is are some issues with using Secure OAD + cache as RAM. The secure OAD solution is already using the cache memory as a scratch space for the ECC workzone and there are issues with placing the .bss in cache alongside the scratch space.


    However, from your logs above it does not appear that you are using security, so this should in theory be possible, but there are some manual steps you will need to add to the linker file (I have already reported these to R&D by the way, they should be fixed in the 2.30 SDKs)

    First I think you will need to add the following line under the MEMORY {} directive (line 267 in cc26xx_app_oad.cmd)

    #ifdef CACHE_AS_RAM
    GPRAM(RWX) : origin = GPRAM_START, length = GPRAM_SIZE
    #endif /* CACHE_AS_RAM */