Hi
LM98714 CCD works well, how to set the VREF?
Attached configuration code and schematic for your reference.
setting.txt
PIXCLK_frq = Inclk_frq; DACCLK_frq = Inclk_frq*2; #else PIXCLK_frq = Inclk_frq/2; DACCLK_frq = Inclk_frq; //��ģʽ�£�Inclk_frq > 5Mhz�� #endif SH_PluseWide = (2*PIXCLK_frq/1000000-1)/2; //��С1.5us������ȡ2us���ң� SH_DelayPointsNum = 1*PIXCLK_frq/1000000; //��С0.5ns������ȡ1us���ң� LM98714_GPIO_Init(); LM98714_SelectPage(0x00); LM98714_Write_Reg(0x00, 0x91); //MODE2-ͨ��GB-Ĭ��˳��-����One color (line) sequence #ifdef Inclk_PIXCLK LM98714_Write_Reg(0x01, 0x55); //BIAS CDS ADCCLK//���Ե�������λ�õ�--CDSģʽ����Ҫ���ݲ��ε���������INCLKΪPIXCLK// 7Mhz #else LM98714_Write_Reg(0x01, 0x58); //BIAS CDS ADCCLK//���Ե�������λ�õ�//��Ҫ���ݲ��ε���������INCLKΪDACCLK(�������5Mhz) 7Mhz #endif LM98714_Write_Reg(0x02, 0x20); //STANDY MODE // LM98714_Write_Reg(0x03, 0x07); // CONFIG Main Configuration 3 LM98714_Write_Reg(0x04, 0x09); // CONFIG Main Configuration 4--LVDS LM98714_Write_Reg(0x05, 0x00); // CONFIG Input Clamp Control-- ccd1711����Ӱ����ͨ�����48���� LM98714_Write_Reg(0x06, 0x00); // CONFIG Auto CLPIN Position--�ݲ����� // LM98714_Write_Reg(0x07, 0x1F); // Ĭ���ڲ�ǯλ LM98714_Write_Reg(0x08, 0x01); // CONFIG Black Level Clamp Control--����������ģʽ����//SH���Զ���ʱ LM98714_Write_Reg(0x09, 13+SH_DelayPointsNum); // CONFIG Auto Black Level Clamp Position--SH����ӳ�ʱ�Ӹ�����13�����ص㣩����� LM98714_Write_Reg(0x0D, 0x08); // CONFIG OSG CLAMP Control--ȷ��������λ�� LM98714_Write_Reg(0x0E, 0x08); // CONFIG OSB CLAMP Control LM98714_Write_Reg(0x0F, 0x00); // CONFIG OSG SAMPLE Control LM98714_Write_Reg(0x10, 0x00); // CONFIG OSB SAMPLE Control // LM98714_SelectPage(0x01); // LM98714_Write_Reg(0x01, 0x01); //Color2 PGA // LM98714_Write_Reg(0x02, 0x01); //Color3 PGA LM98714_SelectPage(0x02); LM98714_Write_Reg(0x00, 0x40); //SH MASTER MODE LM98714_Write_Reg(0x01, SH_PluseWide); //SH PLUSE WIDTH = 20us > 1.5US�� LM98714_Write_Reg(0x02, 0x80); //PIX1/2 Control--ʹ��--����--Ƶ��--SH���Ƿ���Ч LM98714_Write_Reg(0x03, 0xC0); //PIX3/4 LM98714_Write_Reg(0x04, 0xC0); //PIX5/6 LM98714_Write_Reg(0x05, 0xC0); //PIX7/8 LM98714_Write_Reg(0x06, 0x00); //Line Clamp Enable--ѡ��Clamp��ʱ����ԴPIX1-8 LM98714_Write_Reg(0x07, 0x0E); //PIX1 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե������Ϊ��PIXCLKһ�£� LM98714_Write_Reg(0x08, 0x1C); //PIX1 End LM98714_Write_Reg(0x0A, 0x00); //PIX2 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե�� LM98714_Write_Reg(0x0B, 0x00); //PIX2 End LM98714_Write_Reg(0x0D, 0x0E); //PIX3 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե�� LM98714_Write_Reg(0x0E, 0x1C); //PIX3 End LM98714_Write_Reg(0x10, 0x00); //PIX4 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե�� LM98714_Write_Reg(0x11, 0x00); //PIX4 End LM98714_Write_Reg(0x13, 0x0E); //PIX5 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե�� LM98714_Write_Reg(0x14, 0x13); //PIX5 End LM98714_Write_Reg(0x16, 0x00); //PIX6 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե�� LM98714_Write_Reg(0x17, 0x00); //PIX6 End LM98714_Write_Reg(0x19, 0x13); //PIX7 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե�� LM98714_Write_Reg(0x1A, 0x1C); //PIX7 End LM98714_Write_Reg(0x1C, 0x00); //PIX8 Start ����1/2Ƶ���źţ�����������2���������ڵ��κο��ñ�Ե�� LM98714_Write_Reg(0x1D, 0x00); //PIX8 End LM98714_Write_Reg(0x1E, 0x00); //CMOS Data Mode Status Bit Enable--CLK5-10����״ָ̬ʾ LM98714_SelectPage(0x03); LM98714_Write_Reg(0x00, 0x10); //Output Mapping CLK1/CLK2 LM98714_Write_Reg(0x01, 0x30); LM98714_Write_Reg(0x02, 0x50); LM98714_Write_Reg(0x03, 0x70); LM98714_Write_Reg(0x04, 0x0F); //Output Mapping CLK9/CLK10 LM98714_SelectPage(0x04); LM98714_Write_Reg(0x00, 0x00); //Mode Time Config LM98714_Write_Reg(0x01, SH_DelayPointsNum); LM98714_Write_Reg(0x02, 0x0E); LM98714_Write_Reg(0x03, 0xCD+SH_DelayPointsNum); LM98714_Write_Reg(0x04, 14+SH_DelayPointsNum); //Optical Black Pixels Start 14Ps+2P��SH��ճ��������ڣ� LM98714_Write_Reg(0x05, 61+SH_DelayPointsNum); //Optical Black Pixels End 61ps LM98714_Write_Reg(0x06, 0x00); //Start of Valid Pixels LM98714_Write_Reg(0x07, 64+SH_DelayPointsNum); LM98714_Write_Reg(0x08, 0x0E); //End of Valid Pixels LM98714_Write_Reg(0x09, 0xCD+SH_DelayPointsNum); LM98714_Write_Reg(0x0A, 0x0E); //Line End 0ED5-3797����Ԥ��20�����ȱ LM98714_Write_Reg(0x0B, 0xE9+SH_DelayPointsNum); LM98714_Write_Reg(0x0C, 0xFF); //Sample Timing Monitor 1--ѡ���������������м�� LM98714_Write_Reg(0x10, 0x00); //PIX OR/NOR Control 1--PIX1~PIX5���ʱ��������� LM98714_Write_Reg(0x11, 0x00); //PIX OR/NOR Control 2--���ʱ��������� LM98714_SelectPage(0x05); LM98714_Write_Reg(0x00, SH_DelayPointsNum); //PIX1/SH On Guardbands��ʼλ��//��ʼ�ӳ�2�����ڣ�TCD1711Ҫ����С500ns�ӳ� LM98714_Write_Reg(0x01, SH_DelayPointsNum); //PIX1/SH Off Guardbands����λ�� LM98714_Write_Reg(0x02, 0x00); //PIX2/SH On Guardbands LM98714_Write_Reg(0x03, 0x00); //PIX2/SH Off Guardbands LM98714_Write_Reg(0x04, SH_DelayPointsNum); //PIX3/SH On Guardbands LM98714_Write_Reg(0x05, SH_DelayPointsNum); //PIX3/SH Off Guardbands LM98714_Write_Reg(0x06, 0x00); //PIX4/SH On Guardbands LM98714_Write_Reg(0x07, 0x00); //PIX4/SH Off Guardbands LM98714_Write_Reg(0x08, SH_DelayPointsNum); //PIX5/SH On Guardbands LM98714_Write_Reg(0x09, SH_DelayPointsNum); //PIX5/SH Off Guardbands LM98714_Write_Reg(0x0A, 0x00); //PIX6/SH On Guardbands LM98714_Write_Reg(0x0B, 0x00); //PIX6/SH Off Guardbands LM98714_Write_Reg(0x0C, SH_DelayPointsNum); //PIX7/SH On Guardbands LM98714_Write_Reg(0x0D, SH_DelayPointsNum); //PIX7/SH Off Guardbands LM98714_Write_Reg(0x0E, 0x00); //PIX8/SH On Guardbands LM98714_Write_Reg(0x0F, 0x00); //PIX8/SH Off Guardbands LM98714_SelectPage(0x00); LM98714_Write_Reg(0x02, 0x09); //START SCAN BIT OUTPUT ENABLE
From the test we can see the output waveform in the self-test mode of LVDS.
But there is no output in the COMS mode.
Can you give some advice for this issue?
Thanks
Star
