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Does AM335x SDK 7.0 support RGMII driver for SMSC LAN8820 (ethernet phy)?

Samming Wang
Prodigy 180 points
Other Parts Discussed in Thread: AM3358

As titled!

Thanks,

Sam

  • 0
    TI__Mastermind 25235 points

    Hi Sam,

    I checked the kernel drivers and there isn't a specific driver for this particular PHY.

    Best regards,
    Miroslav

  • 0 in reply to Miroslav Kiradzhiyski XID
    Prodigy 180 points

    Hi Miroslav,

    Could you suggest the gigabit ethernet phy which SDK 7.0 supports?

    Thanks,

    Sam

  • 0 in reply to Samming Wang
    TI__Mastermind 25235 points

    Check the drivers inside <kernel_dir>/drivers/net/phy/.

    Best regards,
    Miroslav

  • 0 in reply to Miroslav Kiradzhiyski XID
    Prodigy 180 points

    Hi Miroslav,

    I checked the "Kconfig" file and found "MII PHY device drivers" in it.

    There is no items for "RGMII PHY device drivers".

    Which file should I check for the readiness of RGMII PHY device?

    Thanks,

    Sam

  • 0 in reply to Samming Wang
    TI__Mastermind 25235 points

    The AM335x StarterKit uses Atheros 803x PHY, which is RGMII PHY device. The default kernel configuration for the am335x EVMs works for it. The driver is <kernel_dir>/drivers/net/phy/at803x.c.

    Best regards,
    Miroslav

  • 0 in reply to Samming Wang
    TI__Guru 58045 points

    The RGMII port which connects the Ethernet PHY to AM335x has critical timing requirements that depend on specific PCB circuit trace delays. Some PHYs have registers that must be setup via the MDIO port to configure it to work with specific specific circuit trace delays of the PCB. Even if you find a driver for a specific PHY, you should not assume it is doing to work if the PHY has registers that need to be configured to match the PCB design. You may need to configure the PHY registers to match your PCB design if your PCB design doesn't have exactly the same delays as the PCB that was used to develop the driver.  

    You should have your hardware designer validate his design by performing a timing analysis of the AM335x connected to the PHY which you select.  Once the custom design is ready for software, you may need to work with the hardware designer to know what delays need to be configured in the PHY.

    Regards,
    Paul

  • 0
    Prodigy 145 points

    Hey samming,

    Were you able to get driver for LAN8820 PHY? i have custom board running on am3358 with LAN8820. I am unable to get PHY working. Please share your findings on driver changes for LAN8820 PHY.

    Thanks and Regards,
    Satish.

  • 0 in reply to Satish jadhav
    Prodigy 10 points
    The problem we are facing is that there is no Tx clock out of the GMII1_TXCLK (K18 pin). The MDIO communication with the PHY works and I can communicate with the PHY and get the correct status. I set the PHY register 27 to 0300 to set the RGMII_IDMODE to internal delay since we don't have delays setup on the PCB. The gmii_sel register (offset 0x650) on the AM3358 is not set correctly- it reads 0x0000 but if I try to force it to 0x03A0 (set RGMII ID Mode internal delay off, and set RGMII mode instead of RMII mode) - the register does get set but the Tx clk still does not show any output.
    Is there any way to get Tx clock to start showing some clock? the Pin mux is correct and after these registers are set it should all work...

    Any help would be greatly appreciated.