AM335x: IBIS and DDR_CK and DDR_DQS differential models

Gunter Schmer

Hi,

we have two questions, one on DDR_CK and the other on DDR_DQS models in the IBIS file. The intend is to model these signal with Hyperlinx, but there are some gaps in the model to do this.

(1) DDR_CK, DDR_CKN pair

We see that this pair is not defined as a differential pair (vdiff definition), that seems to be missing. What we see is that the signals are modeled as two single ended signals, DDR_CK with model selector_4 and DDR_CKN with model selector_4. However Hyperlinx is trying to model this as differential pair, and cannot do it, because the vdiff definition is missing. Is there an intent to model the signals as single ended, even though they are truly differential? Can we model differential?

(2) DDR_DQSx, DDR_DQSNx

This time the signals are actually defined as differential signals with the vdiff definition, however the positive side signal is mapped to model selector_1 and the negative side is mapped to model selector_6, i.e. two different models. Each of the models are in fact single ended models. Hyperlinx tries to model these differential signals, but fails because it expects ONE differential model and not two single ended models. How can we model the differential signals?

Thanks!

--Gunter

over 9 years ago

0 Biser Gatchev-XID over 9 years ago

TI__Guru**** 393215 points

Hi Gunter,

I will ask the factory team to look at this.

0 Biser Gatchev-XID over 9 years ago in reply to Biser Gatchev-XID

TI__Guru**** 393215 points

Meanwhile you can take a look at this wiki: http://processors.wiki.ti.com/index.php/How_to_use_the_AM335x_IBIS_Models

0 Gunter Schmer over 9 years ago in reply to Biser Gatchev-XID

TI__Genius 13827 points

Hi Biser,

thanks. The wiki fundamentally shows that for example DQS is still treated as a single ended signal in the model. The question is whether we can support a differential modeling for DQS/DQSN pair with our IBIS model, or if it is intended only as two single ended models. The question then would also be, how the Hyperlinx modeling is done with two separate single ended models, even though the DQS/DQSN is a pair and needs to be matched.

Thanks,

--Gunter

0 ddomke over 9 years ago in reply to Gunter Schmer

TI__Intellectual 2150 points

When you pull the DQS signal into Hyperlynx as the target net, it will identify that DQSn is needed also to form the differential pair from two single ended I/O's. Then you can run the simulation as intended for the pair. Hyperlynx handles the assignment. Obviously, you should interpret the simulation results accordingly.

0 JZ over 9 years ago in reply to ddomke

Prodigy 30 points

Search the keyword "diff" in sprm552, the only hit is in the [diff Pin] section. Haven't found a differential module to support the diff pin yet.

There must be a correct model exists for Ti internal design group to do the DDR related simulation.

0 JZ over 9 years ago in reply to ddomke

Prodigy 30 points

Attached error msg from HyperLynx (DDR IBIS model setting correctly):
1.
Clock Net: DDR_CLK ---
Pin: U102.J7 (+) IBIS Signal: mt41j64m16jt_15eitg.ibs [MT41J64M16JT] CK
Pin: U103.D2 (not differential) IBIS Signal: sprm552c.ibs [am335x_zcz] DDR_CK

Clock Net: DDR_CLKn ---
Pin: U102.K7 (-) IBIS Signal: mt41j64m16jt_15eitg.ibs [MT41J64M16JT] CK#
Pin: U103.D1 (not differential) IBIS Signal: sprm552c.ibs [am335x_zcz] DDR_CKN

2.
The following devices have inconsistent differential DQS/DQS# model mappings.

Controller U103--
ODT Enabled: Model_572 / Model_764

0 Gunter Schmer over 9 years ago in reply to JZ

TI__Genius 13827 points

Hi all,

can we have an update on the currently missing differential models for differential signals like DQS/DQSN and CK/CKN in the AM335x IBIS model?

Thanks,

--Gunter

0 Brad Griffis over 9 years ago in reply to Gunter Schmer

TI__Guru*** 125430 points

Siva gave me the following info when I discussed this with him back in October:

The IO buffer is not a true diff pair. We just have 2 single ended outputs with inverted clocks at the input of the output buffers. A true differential buffer makes sense for input. We guarantee VIX at our device output.

0 Gunter Schmer over 9 years ago in reply to Brad Griffis

TI__Genius 13827 points

Thanks, Brad, I have seen a similar comment about 2 single ended models in another post. This would say that in the simulation we cannot use a differential model. With that we would have two questions:

(1) If Hyperlinx was not used, what simulation tool was used and how was the DQS/DQSN simulation achieved/setup?

(2) If Hyperlinx was used, how can it be set up with the two single ended models?

Thanks,

--Gunter

0 Brad Griffis over 9 years ago in reply to Gunter Schmer

TI__Guru*** 125430 points

My customer was using hyperlinx and worked with the simulation vendor to get it setup properly. (Sorry, I wish I had specifics!)

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AM335x: IBIS and DDR_CK and DDR_DQS differential models