Hi all,
We want to design a system using AM3352 600MHz uC where we want the Arm Processor to boot from an external OTP AT27C010. There after we want that the content of an external NOR Flash [consisting of bit files for two FPGAs and other operations of ARM] is checked and its Checksum is compared with the OTP. Then the bit files of both the FPGAs [Spartan 6 from Xilinx is our choice] be loaded with the bit files in the NOR Flash [Controlled by GPMC].
I want to ask the experts here that what shall be the best architecture for doing this entire activity. Can we even connect both the FPGAs, OTP and NOR Flash on single GPMC controller lines, if so what all are the things that need to be kept in mind.
Thanks and Regards..
Mohit