Question from field:
1) Customer is planning to use both PCIe controllers as separate 1 lane devices and use it to connect between 2xAM5728s or between the AM5728 and a FPGA. Is there any concern that we cannot use these links as endpoint or root complex in any combination?
2) Do we have any benchmarking or means to test this out by interconnecting the EVMs with cables via PCIe somehow ?
