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ADS8688 SPI communication

Other Parts Discussed in Thread: ADS8688, ADS8684, TIDA-00307

I am testing the ADS8688 through SPI port of my MCU. Now I can see all the signals going into ADC are fine but nothing came out on SDO. One thing is my MCU is 3.3V VDD. Is this going to be a problem? Do I have to shift it to 5V. Is there a quick way to check the SPI on the ADC? Thanks, I think I got all the commands right, setting the ranges and manual channel select.

Any comments are greatly appreciated.

F.Z.

  • Also noticed that the VCAP was low close to zero V when REFSEL was grounded. This does not sound right.
  • It's working. The reset pin was the problem
  • Hi Fubin,

    Thanks for the update.  Let us know if you have questions.

    Kind Regards,

    Luis

  • Hi Luis,

    I got the part running. A quick question here: what could be wrong if the first 4 channels are ok the last 4 channels are incorrect. My setup is extremely basic. It does not have caps on REFCAP pin. And it should not be may code since the first 4 channels are "fine" (They read within 200mV). The last 4 are way off.

    Thanks,

    FZ

  • Hi FB,

    The errors you have mentioned (+/-200mV) are much larger than expected.  Is it possible to post a schematic and/or layout plots of the design?

    As you have pointed out, the device requires bypass capacitors on the REFIO, REFCAP, and supplies. The ADS8688 incorporates a SAR ADC Architecture with a PGA front end driving the ADC inputs.  The device also incorporates an internal reference and a reference buffer. 

    Since the reference voltage is sampled several times during each conversion, the reference input pin of the internal SAR ADC presents a dynamic load to the reference source where current transients are present as the internal capacitor array is charged during the conversions process.  Please refer to the figure below (p25-28 datasheet).  The REFCAP pin requires the 10uF bypass capacitor and the REFCAP pin requires a 22uF bypass capacitor in close proximity to the device.  The bypass capacitors are necessary to keep the reference voltage stable and settled to the required resolution during the conversion process.  The bypass capacitors are used as a charge reservoir helping the buffer to provide instantaneous charge for these current transients.  Without the required REFIO and REFCAP bypass capacitors, the reference voltage is probably not stable and/or drooping during the conversion process as you are performing each conversion.   

     The datasheet provides PCB board layout recommendations on p55-56. In addition, please find a link below  to a blog with a general discussion of bypass capacitors for SAR ADC's.

    http://e2e.ti.com/blogs_/b/precisionhub/archive/2014/07/25/sar-adc-pcb-layout-the-reference-path

     Please let me know if issues continue after installing the bypass capacitors.  If possible, please provide a schematic and Gerber layout files of the design and let us know the details/requirements in your application.

    Thank you and Kind Regards

    Luis

  • Yes. The caps helped to fix the problem. I am using a barely working setup built from those adaptors to just test the functionality. Not PCB made yet. Now everything seems working OK! Thanks,
    I noticed that the SDO pin could affect the ADC results too. After putting a buffer to convert 5V SDO to 3.3V for MCU, everything's working. Anyway, it is working now.

    Thanks for the help.
  • Hi F.Z.,

    That's good news. Thanks for the update.

    Kind Regards,

    Luis

  • You mention that the reset pin was the problem.

    What was the exact issue? I'm using ADS8684 and having the same issue. I intend to use internal VREF and hence have pulled the REFSEL# pin to GND. My REFCAP is 22uf and 1uf and REFIO CAP are 10uf and 0.1uf. But still the Voltage at both REFCAP and REFIO pin is near Zero (~7mV).

    If reset pin was posing the problem, it might solve my problem too. Thus please highlight the problem you faced with the reset pin.

  • I've attached the schematic here, the REFCAP have been modified to 22uf and 1uf in the hardware.

  • Hello Atin,

    The CS pin appears to be pulled HIGH & there is no control from the controller based on the schematic shared. Do let me know if my understanding is correct.

    You will need to pull CS LOW for the SPI communication to take place.

    Let us know if this helps.

    Thanks & Regards,
    Shridhar.
  • Hello Shridhar

    Thank you for your response.

    Yes your understanding based on the schematic is correct. We have modified the circuit in hardware and physically have connected the CS# pin to the controller through a wire right now. So CS# is connected to the controller.


    Upon further experimentation, we have replaced R192 with 1K and removed R199 and connected the CS# pin to the controller. What we have observed is as follows

    1. VREF is still Zero

    2. Upon powering up the design, the delay between ramp up of 3.3V and ramp up at the RST#/PD# pin is almost 3ms

    3. Since after 3.3V is received by the ADC on DVDD pin, RST# pin ramps up after 3ms delay the ADC should go in Power Down mode( as described in the datasheet that any low pulse of more than 400ns puts the ADC in Power Down mode).

    4. After going into power down mode, a set data sequence has to be sent to the ADC for it to come out of Power Down mode. But as soon as we start our controller and output SCLK, SDO starts to follow it and whatever be the input at the SDI, SDO still outputs SCLK only. And the ADC still remains in the Power Down mode(our assumption because VREF is Zero and nothing seems to respond)


    Based on my previous post, schematic and the experiments above, what could be going wrong? What is the correct or the most recommended way of handling the RST#/PD# pin?

    Regards

    Atin Jain

  • Hello Atin,

    The schematic updates look fine. If possible try providing a RESET pulse to RST/PD pin by driving through a controller pin or a switch.

    Also, please send one scope capture of the SPI frame. Please have CS, SCLK, SDI & SDO captured simultaneously.

    Thanks & Regards,
    Shridhar.
  • Hello,

    i have found a little mistake in your DAC8688 Datasheet. Please have a look on my screenshot.

    1) DVDD is 3.3V, not 5V.
    2) Why +5V ISO for SPI, when DVDD is 3.3V?

    Best Regards,
    Sebastian

  • Hello Sebastian,

    ADS8688 DVDD supply recommended range is 1.65V to AVDD. In the above example DVDD is connected to AVDD (which is 5V).

    Since the DVDD is 5V in above case, the SPI is running off 5V isolated supply. Towards the controller end, SPI will have 3.3V logic levels.

    Thanks & Regards,
    Shridhar.
  • Yes, thank you. I have one more question to the Daisy Chain Pin. When i don't use daisy should i let float it or tie it to LOW or HIGH?
  • Hello Sebastian,
    If you do not plan to use Daisy chain mode, please tie it to LOW.
    Thansk & Regards,Shridhar.
  • Shridhar%20More,
    Is my intention to use the ADS8684 to measure 4 inputs (4-20mA - PLC application). I'm gonna use the F28027 to perform the SPI com to the ads8684 (3.3V spi com). This is for industrial app. In this case the ads8684 is for single ended app.(GND to 5V max). Could all gnd of the adc's be share with the gnd of the microcontroller? Is recommended or do I need to use different gnd (input of adc and gnd of the uC)? I'm asking this because I see 2 pdf's using the ads8688 (TIDA-00307 and TIDU365B). In one all the gnd are shared and in the other all are isolated.
    Regards
    Gastón
  • Hello Gaston,

    Device AGND & DGND should be connected to the controller GND.

    You can connect individual channel GND pins to device AGND or you can have them connected to the GND reference connection of your input.

    The only requirement is, Individual channel GND should not violate the Absolute Max rating of +/- 0.3V with respect to AGND.

    Thanks & Regards,
    Shridhar.