Parallel EMIF boot mode

dixit parmar

Hi all,

I am referring a code in which they have configured DSP 5502 to boot from connected 16bit flash memory connected on CE1, and a 16bit SRAM is connected on CE0. internal boot loader is copying data from flash and copies in to SRAM. now in that I am unable to understand how internal boot loader will copy the content from flash and copies in to SRAM?how bootloader will get to know that flash content is over? Where and when that code will get executed?

Rgs,

Dixit

over 8 years ago

0 Lalindra Jayatilleke over 8 years ago

TI__Mastermind 30365 points

Dixit,

Please take a look at section 2.6 at http://www.ti.com/lit/an/spra911c/spra911c.pdf This provides the boot table information that should provide more insight. Note that the 32-bit Zero Byte Count (00000000h) indicates the end of the boot table.

Lali

0 dixit parmar over 8 years ago

Prodigy 200 points

Hi Lalindra,
I Got some idea from that document, thank you.

I want to ask you about the portion of bootloader which get repeated section wise, so how does the bootloader knows how many sections are there which ll get copied in to RAM?? Is it maintaining any count for that?

0 Rahul Prabhu over 7 years ago in reply to dixit parmar

TI__Guru** 115390 points

Please refer to the boot table format that is used by the C55x bootloader. The boot table provides the number of section count, the start address of the section and size of the section. Also there is a Boot table trailer info 0x00000000 that indicates end of boot image:

Regards,

Rahul

Processors

Processors forum

Parallel EMIF boot mode