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RTSC platform Cache configuration

Anish Mathew
Intellectual 395 points

Hello C6678 experts,

I am using RTSC platform to create a memory region named L2cache_Reserve of 128KB with start address of 0x00800000 and length 0x7ffff and I also configured L2 Cache of same size using platform.  From my understanding L2 cache is part of L2 memory, L2cache_Reserve is trying to occupy the same memory which is used by L2cache, still RTSC platform wizard is not throwing any warnings or errors . Do the created memory map have L2 cache or just a named region in L2 memory?

Thanks

Anish

Signalogic

  • 0
    TI__Guru* 95265 points

    The 6678 has 512KB L2 per core, L2 memory can be configured as all SRAM, all 4-way set-associative cache, or a mix of the two. When you create a region called L2cache_Reserve with start address of 0x00800000 and length 0x7ffff. Is it 512KB already? What is your goal here? In the RTSC you can select the L2 cache size from the drop down menu.

    Regards, Eric

  • 0 in reply to lding
    Intellectual 395 points

    Hello Eric,

    I was trying to get familiar with Editing RTSC Platform and I believe I should not be creating a region L2Cache_reserve which start address of  0x00860000 as L2 cache of 128K will be needing the same address range (yes It is 512KB already There are different regions in L2 SRAM which adds upto 512 KB without including space needed for cache)

    Thanks

  • 0 in reply to Anish Mathew
    TI__Guru* 95265 points

    From 6678 datasheet: 5.1.3 L2 Memory. It shows that if part of L2 is configured as cache, it uses the higher address memory region. So, suppose you want to divide your L2RAM into several regions in RTSC configuration, you can add entry to that. But the region which is overlapping with cache can't be used. For example, you can create a region called as   L2Cache_reserve which start address of  0x00860000 with length of 128K. If you define "L2 cache" as 128K as well in RTSC, you can't use the "L2Cache_reserve" region for data and code. If you define "L2 cache" as 32K, then you can still use the lower portion 96K of the "L2Cache_reserve" region for data and code.

    Below is an example RTSC from 6678 HUA demo configuration. The first 128K is reserved region for IBL, next 352K is for free usage L2 RAM, the last 32K is L2 cache.

    Regards, Eric

     

     

     

    Regards, Eric