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How to generate c6657 nand boot boottable?

Other Parts Discussed in Thread: TMS320C6657

Dear all,there is a TMS320C6657 in our custom board, the DSP boot mode is "nand boot, nand parameter not read from  i2c paraneter", but we find it cann't work,somebody tells us there is a bug in this boot mode,so we intend to use the boot mode  "nand boot, nand parameter read from  i2c paraneter",can it work? By the way, could anybody tell us how to make a  nand boot image that can be written into nand flash and can be downloaded into DSP MEMORY by RBL?

Regads,

Rolan

 

  • Where are the TI's engineers?

  • Hi Rolan,

    Sorry for the delayed response on this issue. I understand that you are trying to do a Native NAND boot on the C6657 custom board. We have created an example for this using production version of C6657 EVM that I would like to share with you. I have attached the example and the related documentation below:

     0358.Nandboot_release.zip

    4073.Booting C6657 EVM directly from NAND.docx

    There is an advisory note that is being added to the Errata associated with this boot mode that I would like to make you aware of. Here is the summary of the issue

    Booting from a NAND flash device will fail when the C6657/C6655 at full speed. The root cause of the problem is that insufficient time is allowed for the NAND device to complete the initial reset command sent to it by the DSP ROM code. After sending the reset command, the DSP executes a wait loop(for time out). This wait loop allows a maximum number of iterations before halting and declaring that the NAND is not responding correctly. The wait loop does not allow enough time for the NAND to complete its initial reset sequence.

    Proposed work arounds:

    • Use the FPGA firmware on the system to first apply reset to the NAND flash device and then apply reset to C6657 device after the NAND device is ready.
    • After a POR of the devicie, apply CPU reset. The CPU reset only restarts the RBL and allows the NAND flash device to complete its initial transition out of reset. This will work because NAND devices complete the second and subsequent reset sequences faster when compared to the initial reset sequence (5 micro-seconds vs. 300 micro-seconds) NAND boot can be made to work by simply taking C6657/C6655 back into reset and then releasing it from reset. This extra reset sequence must be done without cycling power to the NAND device. Resetting C6655/C6657 after an initial NAND boot attempt works since the wait loop is long enough for success on a second boot attempt)

     Regards,

    Rahul

  • Hi,Rahul,

    Thanks a lot for your reply!

        Limited to our custom borad's hardware design, the proposed work arounds cann't solve our custom borad's boot problem,because we have no ways to reset the DSP again after power on except manul reset. so we had to try the boot mode"I2C Master Mode, I2C bus address 0x51,I2C slow mode, index of the configuration table=2, nand boot through IBL", and  the try failed, but we can found the I2C's activities after power on through Oscilloscope,do we need to modify the IBL?

      Besides,I wonder if this boot mode  have the same problem of the "native nand boot mode" ?

     

    Best regards,

    Rolan

  • There are no known issues with I2C boot mode on C6657 and the I2C to NAND boot has been demonstrated as part of the MCSDK. You may need to modify the IBL if the custom board has different hook ups to boot media for eg CS on which NAND is connected is different, NAND flash device geometry is different, etc

    Regards,

    Rahul

  • Hi Rahul,

    I find some posts in this community said the IBL BOOT needs FPGA,is FPGA essential for c6657's IBL boot-up?

    Regards,

    Rolan

  • The IBL provided in the MCSDK package is provided for the Advantech EVMs that have an FPGA on it. If you look at the IBL code there are few transactions made from the IBL code with the FPGA over the SPI interface. Please refer to C665xInit.c file in the IBL source code to take a look at FPGA related initialization code. 

    If your design doesn`t contain an FPGA, you can clean up the code that sets up the FPGA configuration and should able to boot the IBL from I2C EEPROM

    Regards,

    Rahul

  •  A  few days ago, we  found the code related to the FPGA  configuration and removed it  , then our custom board could boot the IBL from I2C EEPROM  immediately. Thank you, Rahul!

    Regards,

    Rolan

  • Hi Rahul Prabhu:

    using  your examble above , my board can succesfully boot . but the dat file  must be less than one page , once the dat file  is larger than one page ,it can't boot successfully .Can you help me with this question ?

    Regard 

  • I have seen your other post and will address it there. This is a closed post so it would be difficult for me to track.

    Regards,

    Rahul

  • Hello Tang Rolan

    Now I have the same problem as you before. A few days ago ,i successfully finished the nand boot in the EVM board. But now I  have to accomplish the nand boot in my own custom board. My custom board could not boot the IBL from I2C EEPROM. My board has a fpga ,similar to the EVM board, fpga has the bootpins,so is it necessary for me  to modify the IBL, then burn the IBL into the EEPROM? I think I don't need to remove the code related with FPGA, am I right ?  I use the IBL(not modify), but i can't see the nand boot result.

    Another question ,how can I know the modified IBL is correct ? just see the nand boot result ? How can I use the CCS software to debug the IBL?

    thanks in advance!

  • Hi zhonghong zhang,

    We would recommend you to create new thread for faster response. Old threads will get less attention then new.

    Thank you.