Hi guys,
I am using AIF2 module on C6670 EVM board and generating a periodic frame sync signal to PHYSYNC and RADSYNC pins with a external clock source. The question is the frame boundary from external clock source doesn't macth the system clock. For example, a frame timing for system clock is 3072000 clock ticks, but the timing for external clock source may be 3072001 or 3071988. What should I do to compensate this problem. Thanks.
Ming-Che Lin