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Problems reading registers from Network coprocessor on Keystone 2

I'm trying to better understand the network coprocessor configuration, and am reading the register contents  in conjunction with the manuals, bu am unable to get the register data.

I am running on a Keystone II EVM, using the Linux that came with the board.

According to the documentation, the CETCP is located at either

0x24000000 NETCP15 config NETCP15

or

0x02000000  Network Coprocessor 0(Packet Accelerator, 1-gigabit Ethernetswitch subsystem...

Within this, the Ethernet switch is at offset 0x90000

and inside that, the switch is offset at 0x800, and the MDIO is offset at 0x300

The MDIO version should be 0x00070104, and the switch version should be 0x4ed8011 (though I am aware they may be slightly different)

Reading the appropriate memory locations using 0x02000000 as the base  gives:

root@k2e-evm:~# devmem2 0x02090300
/dev/mem opened.
Memory mapped at address 0xb6f2f000.
Read at address  0x02090300 (0xb6f2f300): 0x00000000
root@k2e-evm:~# devmem2 0x02090800
/dev/mem opened.
Memory mapped at address 0xb6f35000.
Read at address  0x02090800 (0xb6f35800): 0x00000000

Reading the appropriate memory locations using 0x24000000 as the base  gives:

root@k2e-evm:~# devmem2 0x24090300
/dev/mem opened.
Memory mapped at address 0xb6f2c000.
Read at address  0x24090300 (0xb6f2c300): 0x4E5B2900
root@k2e-evm:~# devmem2 0x24090800
/dev/mem opened.
Memory mapped at address 0xb6f74000.
Read at address  0x24090800 (0xb6f74800): 0x4E5B2900

Neither gives close to the expected results.

In fact, and register read around the 0x24090000 region gives the same data value. eg

root@k2e-evm:~# devmem2 0x24090814
/dev/mem opened.
Memory mapped at address 0xb6f42000.
Read at address  0x24090814 (0xb6f42814): 0x4E5B2900

I have verified that the power domains for the NETCP is turned on (domain = 2):

root@k2e-evm:~# devmem2 0x02350208
/dev/mem opened.
Memory mapped at address 0xb6f6a000.
Read at address  0x02350208 (0xb6f6a208): 0x00000301


And the clocks enabled (domains 7, 8,):

root@k2e-evm:~# devmem2 0x0235081c
/dev/mem opened.
Memory mapped at address 0xb6f39000.
Read at address  0x0235081C (0xb6f3981c): 0x00001F03
root@k2e-evm:~# devmem2 0x02350820
/dev/mem opened.
Memory mapped at address 0xb6fda000.
Read at address  0x02350820 (0xb6fda820): 0x00001F03

Clock domain 50 (10GbE) is not turned on, but the ethernet is working, so I assume it is not required.

What else might I need to do in order to access the register information?

Thanks.

  • Hi,

    To enable the 10Gig Ethernet Driver, add the following two lines in file arch/arm/configs/keystone2_defconfig or arch/arm/configs/keystone2_fullrt_defconfig, and do a distclean build.


    Go through the wiki to find more detailed info for how to enable or disable the 10GbE support, 
    http://processors.wiki.ti.com/index.php/MCSDK_UG_Chapter_Exploring#10Gig_Ethernet_Driver

    To read the register vaule using devmem utility is correct. Did you try to write some values? Is it working?
    >devmem2 Address w value

    Execution of user mode examples and tests included in MCSDK by default requires root previlige.
    This is primarily dependency of devmem for mapping the device memory which by default is restricted to super user. The default mechanism is also to reduce exposure of device memory to any user not having admin privilege.

  • Thanks for answering.

    I am running devmem as root, so am surprised that the registers don't respond.

    Writes also fail.

  • Hi,

    Did you try to read or write the registers using CCS? Will try some other register address access using devmem on ARM using Linux?

  • Sorry for late reply - I've been out of the office for a while.

    I've discovered the root problem.

    The register set is not where the documentation says it should be. Perhaps there is a later version I've not been able to get.

    The ethernet module is at 0x24200000 instead of 0x24090000

    and the MDIO is at offset 0xF00 within this instead of at 0x300.

    There are more copies of the SGMII modules at offests 0x100 - 0x800.

    The U-boot code uses the base address above, and a bit of experimentation showed the other register differences.

  • Hi,

    Yes, I hope you have found the right register address and shared the details here. This will be useful for some other readers.

  • I've found a more up to date document ont he GbE switch internals:

    http://www.ti.com/lit/pdf/spruhz3

    This shows the same register addresses as the u-boot code.