Directly using IPC with CSL

I don't use BIOS. I use EVM6678 and CCS 5.5. In my multicore but single image project I need IPC for cores synchronization. I would like to use CSL for directly access to IPC. Here is my example code inside main function:

	Uint32 core_id = CSL_chipReadDNUM();
	Uint32 i;

	if (core_id == 1)
	{
		GPIO_DIR = ~(1<<GPIO_15);

	    if (intc_init() < 0)
	    {
	        printf ("Error: Initialization of the INTC module failed\n");
	        return;
	    }

	    CSL_IntcEventHandlerRecord  EventRecord;
	    CSL_IntcParam               vectId;
	    CSL_IntcHandle              ipcIntcHandle;

	    /**************************************************************
	     ********************** INTC related code *********************
	     **************************************************************/

	    /* Open INTC */
	    vectId = CSL_INTC_VECTID_5;
	    ipcIntcHandle = CSL_intcOpen(&ipcIntcObj, 91, &vectId, NULL); //event ID 91 for IPC_LOCAL

	    /* Bind ISR to Interrupt */
	    EventRecord.handler = (CSL_IntcEventHandler)&ipc_interrupt; //register ISR function
	    EventRecord.arg     = (void *)ipcIntcHandle;
	    CSL_intcPlugEventHandler(ipcIntcHandle, &EventRecord);

	    /* Event Enable */
	    CSL_intcHwControl(ipcIntcHandle, CSL_INTC_CMD_EVTENABLE, NULL);
	}

    while(1)
    {
    	if (core_id == 0)
    	{
    		CSL_IPC_genGEMInterrupt(1, 0); //interrupt from CORE0 to CORE1
    		for(i = 0; i < 10000; i++); //delay
    	}
    }

In this case I need call interrupt from CORE0 to CORE1. Here is my ISR function:

static void ipc_interrupt (void *arg)
{
	GPIO_OUT_DATA = GPIO_OUT_DATA ^ (1<<GPIO_15); //blinking GPIO_15

    /* Clear the event ID. */
    CSL_intcEventClear((CSL_IntcEventId)arg);
}

My intc_init() function:

static Int32 intc_init (void)
{
    CSL_IntcGlobalEnableState   state;

    /* INTC module initialization */
    context.eventhandlerRecord = NULL;
    context.numEvtEntries      = 0;
    if (CSL_intcInit(&context) != CSL_SOK)
        return -1;

    /* Enable NMIs */
    if (CSL_intcGlobalNmiEnable() != CSL_SOK)
        return -1;

    /* Enable global interrupts */
    if (CSL_intcGlobalEnable(&state) != CSL_SOK)
        return -1;

    /* INTC has been initialized successfully. */
    return 0;
}

ISR doesn't occur inside CORE1. For test purposes I run CORE1 and then CORE0. Where is my mistake ? Hope someone can help me. I need it for my scientific application in electrical engineering for real time modeling of electric circuits.

I attached complete project from CCS in ZIP format. My PDK version is 1.1.2.5.