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C6678 DDR3 leveling registers (boot cfg registers), where are they?

Michael Stich
Expert 1505 points
Other Parts Discussed in Thread: SYSBIOS

I'm trying to understand how and when the DDR3 leveling (boot cfg) registers get initialized.  I'm using a EVM6678 with PDK6678 1.1.2.6., SYSBIOS 6.41.0.26 XDCTOOLS 3.30.5.60 

  1. Where are these registers (0x02620000 base address) documented? Can't find them in the device data sheet, or the DDR Phy guide.
  2. What is their reset value, e.g. of the leveling registers?
  3. I can't seem to find them in the CCSv6 register view, how does one look at them?
  4. Is there anywhere in the EVM PDK platform_init function that initialize these? Or in SYSBIOS target or platform support somewhere?

Thanks 

Mike

  • 0
    TI__Mastermind 43660 points
    Hello Mike,

    1. The registers with base address 0x02620000 are chip level registers. The device status and DDR3 configuration registers are mapped on this. Please refer table 2.2 in device datasheet.
    2. The DDR configuration and leveling registers with their reset values are explained in DDR3 memory controller for keystone devices user guide.
    3. Please create a thread in CCS forum to get this clarified.

    Regards,
    Senthil
  • 0
    TI__Mastermind 28085 points
    Hi Mike,

    Ans4: Yes, the platform_init function initialize the DDR3 registers. For more information refer below code.
    platform_init() - "\ti\pdk_C6678_1_1_2_6\packages\ti\platform\evmc6678l\platform_lib\src\platform.c"
    DDR3Init() - "\ti\pdk_C6678_1_1_2_6\packages\ti\platform\evmc6678l\platform_lib\src\evmc6678.c"

    Thanks,