How is raw computational performance calculated by TI?

Xining,

If you look through the instructions listed in the CPU and Instruction Set Reference Guide, you will find many instructions that will perform multiple floating-point operations in a single cycle. If you write assembly code that uses the most highly parallel instructions on all of the available execution units, you will be able to execute 16 FLOPs per cycle when the pipeline is filled and being maintained. This is how you achieve the 22.4 GFLOPS @ 1.4 GHz.

This does not include the overhead to get the pipeline loaded. This is an instantaneous operation rate to offer the maximum theoretical number of floating point operations that can be performed. This is not an average operation rate, but is a good measure of the maximum rate that can be done.

I do not have a list of instructions or code example to give you. I will leave that as an exercise for you to search through the CPU and Instruction Set Guide to find the applicable instructions. It seems like someone did that years ago when the part was introduced, so you may want to search the forum and the Wiki to find someone else's work. Or you can list the ones you find here for future users to address this question.

Regards,
RandyP

Hi Rhandy and Xining,

there's a nice table in the Instruction set User's Guide explaining this:

All you need to do in addition is to multiply by the frequency you run the core at.

Kind regards,

one and zero