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Execute a sysbios project over ethernet in tms320c6678

Other Parts Discussed in Thread: SYSBIOS

My DSP boots up from a NOR flash with each core running a sysbios project. Now I have compiled another sysbios project for a particular core which i have to run from the same core without flashing the flash device and disturbing the other cores. what are the options available? Awaiting a reply eagerly

Thanks

Girish

  • Hi,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com). Please read all the links below my signature.

    Better to use TFTP Boot for your requirement. In TFTP Boot mode, IBL will download the boot image from TFTP server and boot from it. For more information refer the following MCSDK path: \ti\mcsdk_2_01_02_06\tools\boot_loader\examples\i2c\tftp

    Thanks,

  • Also, you can run any example with emulator with "DSP no boot" mode settings.
  • Hi Girish,
    Are you working on custom board or EVM? I would suggest you to use "No boot" mode to load and run on the specific cores. Please refer below link for switch settings.

    processors.wiki.ti.com/.../TMDXEVM6678L_EVM_Hardware_Setup

    Please go through all the links below my signature.
    Thank you.
  • Supposing i want to have an application running in core 0 (runs NDK and takes care of all ethernet transfers) which can fetch the application image for other cores (selectable) over ethernet from a PC and place it in DDR, what are the things that i need to do to run the fetched application in the respective cores? my ultimate objective is to control the sysbios projects running on each core from a PC over ethernet. is it possible to override a sysbios project with another one? though core 0 handles the image transfers there may arise a need to override this image with a new image with NDK embedded in it? Can you suggest some ways to accomplish this?
    Thank you

  • Supposing i want to have an application running in core 0 (runs NDK and takes care of all ethernet transfers) which can fetch the application image for other cores (selectable) over ethernet from a PC and place it in DDR, what are the things that i need to do to run the fetched application in the respective cores?


    Yes, It is possible. The primary core(core 0) can load application and wake up the secondary cores of C6678 DSP.  Following should be followed to run other cores,

    1. Unlock the chip registers
    2. Write the entry address to other cores
    3. Wait for 1 Sec.
    4. Generate IPC interrupt to other cores

    You can test the below attached source code in debug mode to wake up the secondary cores from core0,
    boot_helloworld.c
    /******************************************************************************
     * Copyright (c) 2011 Texas Instruments Incorporated - http://www.ti.com
     *
     *  Redistribution and use in source and binary forms, with or without
     *  modification, are permitted provided that the following conditions
     *  are met:
     *
     *    Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     *    Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the
     *    distribution.
     *
     *    Neither the name of Texas Instruments Incorporated emac the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
     *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
     *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
     *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
     *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     *
     *****************************************************************************/
    
    /**************************************************************************************
     * FILE PURPOSE: Boot Hello World Example
     **************************************************************************************
     * FILE NAME: boot_helloworld.c
     *
     * DESCRIPTION: A simple hello world example demonstrating boot.
     *
     ***************************************************************************************/
    #include <stdlib.h>
    #include <stdio.h>
    #include <string.h>
    #include "platform.h"
    
    #define DEVICE_REG32_W(x,y)   *(volatile uint32_t *)(x)=(y)
    #define DEVICE_REG32_R(x)    (*(volatile uint32_t *)(x))
    
    #define CHIP_LEVEL_REG  0x02620000
    #define KICK0           (CHIP_LEVEL_REG + 0x0038)
    #define KICK1           (CHIP_LEVEL_REG + 0x003C)
    
    /* Magic address RBL is polling */
    #ifdef _EVMC6657L_
    #define MAGIC_ADDR          0x8ffffc
    #endif
    
    #ifdef _EVMC6678L_
    #define MAGIC_ADDR          0x87fffc
    #endif
    
    #ifdef _EVMC6670L_
    #define MAGIC_ADDR          0x8ffffc
    #endif
    
    #define BOOT_MAGIC_ADDR(x)  (MAGIC_ADDR + (1<<28) + (x<<24))
    #define IPCGR(x)            (0x02620240 + x*4)
    
    #define NUMBER_OF_CORES 	2
    
    #define BOOT_MAGIC_NUMBER   0xBABEFACE
    
    #define BOOT_NUMBER0   0xAAAA5555
    #define BOOT_NUMBER1   0x11111111
    #define BOOT_NUMBER2   0x22222222
    #define BOOT_NUMBER3   0x33333333
    
    #define DDR_ADDR0       0x81000000
    #define DDR_ADDR1       0x82000000
    #define DDR_ADDR2       0x83000000
    #define DDR_ADDR3       0x84000000
    
    
    
    #define BOOT_UART_BAUDRATE         115200
    
    /* boot_helloworld version */
    char version[] = "01.00.00.01";
    
    /* OSAL functions for Platform Library */
    uint8_t *Osal_platformMalloc (uint32_t num_bytes, uint32_t alignment)
    {
    	return malloc(num_bytes);
    }
    
    void Osal_platformFree (uint8_t *dataPtr, uint32_t num_bytes)
    {
        /* Free up the memory */
        if (dataPtr)
        {
            free(dataPtr);
        }
    }
    
    void Osal_platformSpiCsEnter(void)
    {
        return;
    }
    
    void Osal_platformSpiCsExit (void)
    {
        return;
    }
    
    /******************************************************************************
     * Function:    write_uart
     ******************************************************************************/
    void
    write_uart
    (
        char*      msg
    )
    {
        uint32_t i;
        uint32_t msg_len = strlen(msg);
    
        /* Write the message to the UART */
        for (i = 0; i < msg_len; i++)
        {
            platform_uart_write(msg[i]);
        }
    }
    
    void
    write_boot_magic_number
    (
        void
    )
    {
        uint32_t                coreNum;
    
        coreNum = platform_get_coreid();
    
        DEVICE_REG32_W(MAGIC_ADDR, BOOT_MAGIC_NUMBER);
        
        while(1);
    }
    
    /******************************************************************************
     * Function:    main
     ******************************************************************************/
    void main ()
    {
        char                    version_msg[] = "\r\n\r\nBoot Hello World Example Version ";
        char                    boot_msg[80];
        platform_info           pform_info;
        uint32_t                coreNum, core;
    
        /* Initialize UART */
        coreNum = platform_get_coreid();
        if (coreNum == 0)
        {
            platform_uart_init();
            platform_uart_set_baudrate(BOOT_UART_BAUDRATE);
    
            printf("%s%s\n\n", version_msg, version);
    
            /* Unlock the chip registers */
            DEVICE_REG32_W(KICK0, 0x83e70b13);
            DEVICE_REG32_W(KICK1, 0x95a4f1e0);
    
            /* Writing the entry address to other cores */
            for (core = 1; core < NUMBER_OF_CORES; core++)
            {
                sprintf(boot_msg, "\r\n\r\nBooting Hello World image on Core %d from Core 0 ...", core);
                printf("%s\n",boot_msg);
                
                DEVICE_REG32_W(BOOT_MAGIC_ADDR(core), (uint32_t)write_boot_magic_number);
    
                /* Delay 1 sec */
                platform_delay(1);
            }
            for (core = 1; core < NUMBER_OF_CORES; core++)
            {
                /* IPC interrupt other cores */
                DEVICE_REG32_W(IPCGR(core), 1);
                platform_delay(1000);
            }
    
        }
        else
        {
            write_boot_magic_number();
        }
    
        while(1);
    }
    

  • Hi Raja,
    you mean to say that the other cores have to be idle until core 0 loads the application to the respective locations of other cores? what if some sysbios application is already running in those cores? how do we treat this case? how do i bring back the peripherals to their initial state?