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[K2H EVM] I2C and Uart connections

Naoki Kawada
Guru 19890 points
Other Parts Discussed in Thread: UCD9090

Hi,

My customer is planing to design their target board with K2H. To do this, they are trying to understand the current K2H EVM schematic.
I'm just looking at :

Please refer Microcontroller Block Diagram at page 9.

Now some questions:

  1. What is the purpose of the UART connection between MCU and K2H ? Can I understand this is a bus for sending LCD information data (IP address) from K2H to MCU ?

  2. I2C0 on K2H is connected to I2C1 on MCU. Is this used to access MCU registers from K2H side in runtime ? If yes, what is the main purpose for ?

  3. Also, this I2C bus is connected to EEPROM and UCD9090. From my understanding, K2H would be a bus master to EEPROM (read and write) and the connection between MCU and EEPROM is just reserved option. And as for UCD9090, the main control bus (UCD9090 programmer) would be PMBUS via Fusion software and MCU would do nothing for UCD9090 in runtime. MUC would monitor POWER GOOD status of UCD9090 in order to control K2H reset signals (like POR, RESETFULL, etc...) via IO expander. Correct ?
     
  4. I2C1 on K2H is connected to Microchip IO expander (SPI to GPIO). Is this used to access K2H from MCU side in runtime ? If yes, what is the main purpose for ?

Best Regards,
Naoki

 

  • 0
    TI__Mastermind 43660 points
    Naoki Kawada,

    1. Yes, the UART interface between SoC and MCU could be used for sending information.

    3. Your understanding is correct. The MCU monitors the power status of UCD9090 to control reset signals.

    For other two questions, i will check and update you.

    Regards,
    Senthil
  • 0
    TI__Mastermind 43660 points
    Naoki,

    2. Here I2C1 on MCU act as a master and I2C0 on K2H act as a slave. However in BMC software, this interface is not used for any purpose.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Guru 19890 points
    Hello Senthil,

    Thank you for your quick reply. Understood.

    Well, I can't guess any purpose of the connection of 4, but anyway I'll wait for your answer for 4. If it could be taken as "don't case", it's ok for me.

    And about 2. Here is a snippet from EVM Technical Reference Manual :

    2.6 MCU
    The MCU (TI LMS2D93) controls the reset mechanism of the SoC and provides boot mode
    and boot configuration data to the SoC through SW1. MCU also provides the transformation
    of TDM Frame Sync and Clock between AMC connector and the SoC. The MCU also supports
    3 user LEDs and 1 user switch through control registers. All MCU registers are accessible
    over the SPI interface.

    As you see in the schematic, there is no SPI connection between K2H and MCU so before issuing this post I guessed the last sentence might be a typo and would be " All MCU registers are accessible over the I2C interface". That's why I asked the question of 2.
    Because you are saying MCU is a master on the connection of 2, I'm a bit confusing.

    Best Regards,
    Naoki
  • 0 in reply to Naoki Kawada
    Guru 19890 points
    Any updates on this ?

    Best Regards,
    Naoki
  • 0 in reply to Naoki Kawada
    TI__Mastermind 43660 points
    Naoki,

    I am working with internal team to get this answered.

    Thanks for your patience.

    Regards,
    Senthil