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CPRI Interleave

David Halls
Intellectual 1000 points

Hi,

I am using CPRI 4x for LTE 20MHz, and I find that the interleaving is wrong so that the received samples from my RF board have every group of four samples in reverse. Same when I transmit from the DSP and look at the RF board output.

In the code I am using (recycling) there was

aifObj.linkConfig[i].cpriEnaSuperPacket = AIF2_CPRI_INTERLEAVE;

where aifObj is AIF_ConfigObj 

I have pdk_C6670_1_1_2_6, and this no longer exists, neither cpriEnaSuperPacket, not AIF2_CPRI_INTERLEAVE. So I had to just remove this line?! 

I tried adjusting cpriPack mode to 1b1, 2b2, 4b4 and 8b8, but none of these work.

Help! :)

Thanks,

David

  • 0
    TI__Guru**** 161600 points
    Hi David,

    I've forwarded this to the design team. Their feedback will be posted directly here.

    Best Regards,
    Yordan
  • 0
    TI__Mastermind 21025 points

    Hi David,

    What are the values of these registers:

    DB_IDB_CFG_CH[channel_num] (AIF2 offset 0x10400 + channel_num * 4)

    DB_EDB_CFG_CH[channel_num] (AIF2 offset 0x11400 + channel_num * 4)

    In particular, the DAT_SWAP fields.  If they are 0, try 3, and if 3, try 0.

      -dave

  • 0 in reply to db_woodall
    Intellectual 1000 points

    Hi!

    I am afraid I am still somewhat of a rookie, could you give me some advice or point me to another post in order to track down these registers, and make the adjustments?

    Thanks!!

    David

  • 0 in reply to David Halls
    TI__Mastermind 21025 points

    No problem.  Do you have the AIF2 user guide for Keystone1? (You can search ti.com for SPRUGV7D).  The user guide contains a wealth of information, including register offsets and descriptions.  For the registers I listed above, the DAT_SWAP fields are in bits 0 and 1.

    You will also need the datasheet for the C6670 (a Nyquist variant).  The datasheet provides the top level memory map for the device.  You'll find the AIF2 base address (for AIF2 configuration registers) at 0x01f0_0000.

    Finally, you will need Code Composer Studio installed, and the debugger started and your executable loaded.  You can halt execution, and enter an address into the Memory Browser window (you can find this under View->Memory Browser if it's not already open.  So, if you add the offsets above to 0x01f0_0000, then you can inspect the register values.  These particular registers are tables, which means there's a separate register for each of the possible channels - so  you'll need to know what channels are configured (this can also be determined from the registers - for eg, DB_IDB_CH_EN (offset 0x10010) gives 1 bit per Ingress channel).

    So, if you have channel 0 enabled, you'd look at 0x01f1_0400 for DB_IDB_CFG_CH.  All registers in the device are 32-bit and can only be read and written as 32-bits. So if you want to change only bits 0-1, just overwrite the lowest nibble - you can write new values directly in the Memory Browser.

     -dave

  • 0 in reply to db_woodall
    Intellectual 1000 points
    Thanks Dave,

    When I browse to 0x01f0_0000 (AIF2 base address) + 0x10010, I see 0000_000F, which presumably means four channels are configured (1111)?

    At 0x01f00000 + 0x10400 + 0*4 (DB_IDB_CFG_CH)

    I see,

    00000100 00000100 00000100 00000100

    so the DAT_SWAP fields are all 0s, so I could try changing these to 3? In your post you said "For the registers I listed above, the DAT_SWAP fields are in bits 0 and 1" so should I change bits 0 *and* 1?

    At 0x01f00000 + 0x11400 + 0*4 (DB_EDB_CFG_CH)

    I see all 0s.

    I am afraid I've not been able to get the document you suggested, the link seems to be dead.

    www.ti.com/.../getliterature.tsp

    Going forwards, if making these changes works - how do I make them persistent/permanent?

    Thanks,

    David
  • 0 in reply to David Halls
    Intellectual 1000 points

    Hi Dave,

    So you said to change bits 1-0, which presumably means change them to 0b11, i.e. 3? I think this might be working, but how do I make it change at startup?

    Thanks!

  • 0 in reply to David Halls
    Intellectual 1000 points
    This may be brute force, but I just put the following in the beginning of the startup code

    // DAT_SWAP for CRPI
    Uint32 *DB_IDB_CFG_CH0 = (Uint32 *)0x01F10400;
    DB_IDB_CFG_CH0[0] = (Uint32)0x00000103;
    Uint32 *DB_EDB_CFG_CH2 = (Uint32 *)0x01F11408;
    DB_EDB_CFG_CH2[0] = (Uint32)0x00000003;

    and that seems to work
  • 0 in reply to David Halls
    TI__Mastermind 21025 points

    Hi David,

    Thanks for pinging the thread.  Yeah, we did this backwards, but it's easier if you think you know what HW changes are needed.

    The AIF2 LLD fields for EDB/IDB Data Swap are:

    EgrDbSetup.EgrDbChannel[x].DataSwap

    IngrDbSetup.IngrDbChannel[x].DataSwap

    If you look in the function AIF_initHW() (ti/drv/aif2/src/AIF_init.c), you'll see these values are set based on several things like CPRI vs. OBSAI, LTE vs. WCDMA, etc.  These choices may or may not be what you need.  If not, you will have to poke in your values like you've shown above, or another way to do it is by calling a few functions in /ti/csl/csl_aif2HwControlAux.h:

    CSL_aif2EDbChannelSetup();

    CSL_aif2InDbChannelSetup();

    Just make sure you look at what the functions modify in HW, because they both set another register besides the one you want to change.

      -dave