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Examples

Other Parts Discussed in Thread: RFSDK, 66AK2L06, DAC38J84, TIDEP0081

I have downloaded the latest MCSDK with included PDK. Inside are a lot of examples. All I really want to do is just talk to an ADC and send it to the FFT. And the reverse talking to an external JESD204B DAC. Do I need to dig into one of the IQN examples including LTE or WCDMA or the one with the DFE in the title? Maybe the iqn2DfeDualModeK2LTestProject ??

  • We recommend you to use latest Processor SDK for K2L device.
  • Yes, I know. I am. I am trying to fish through all of those examples and get to one that is closest to the application I described above. Any other advice?
  • I have pinged our K2L experts, they will get back to you on this query.
  • Hi,


    If you want to access DFE and JESD, then you need to use AID module within IQN2.  For the example programs, this means an LTE/AID/DFE example, probably with JESD loopback.  I would avoid a dual-mode example if possible, because the IQN2 configuration is more complex.  Do you want to bypass DFE functionality?

     -dave

  • Hello,

    In order to have an ADC sample and output JESD204B data, which is received in DFE, converted to streams and baseband data.  This is not just the MCSDK / Processor SDK, but includes the RFSDK.   

    If your goal is to take the ADC samples and directly send them through DFE, IQN to FFTC to memory.  The design 2 JESD Attach RFSDK example converts:

         real ADC sampled at 245.76Msps, with IF frequency of 61.44e6.

         converted using Hilbert transform to complex data (required for DFE transport) at 122.88e6 complex, with Fs/4 tuning to 0.

         One Rx stream is converted to one Baseband Rx output at 122.88Msps.   

        This is processed through DFE, IQN to FFTC to memory.   You can request access to the RFSDK for this design.   You would need a TCI6630K2L/66AK2L06

         EVM, and a 14x250 ADC EVM.   The RFSDK (can be requested through My Secure Software), is built on top of the MCSDK 3.1.4.7

    www.ti.com/.../tidep0060

    Regards,

    Joe QUintal

  • No, I want the DFE functionality.
  • I want the DFE functionality. Would this example be better iqn2LteDfeK2LTestProject than the iqn2DfeDualModeK2LTestProject ??
  • Joe,

    I have the EVM and the RFSDK. We will be using custom ADC and DAC boards. It seems what I have read about the RFSDK is that it is command line driven? I need software that can free run on the K2L. I can unzip some more of the examples and I just found another document that may be helpful. But I feel like I am just fishing around.
  • Any thoughts on the above?
  • So, from the RFSDK user guide I see this:
    Release 02.00.05.00
    1.3 Software Overview

    The RFSDK is software that aims to makes it simple to use all the components of the Radio System.

    Its functionality is controlled through two utilities:

    radio command: offer an interface for the OAM system to setup and turn on the radio.
    dpdcmd command: enable the DPD functionality of the RFSDK once the radio has been turned on.

    These interfaces are for now command line based.

    There is also a set of Python APIs, but they are not documented at this stage, and might still be subject to change.

    There is currently no C or C++ set of APIs exposed.

    This appears to be command line based. I will have a custom board that I need custom code for .
    Are you suggesting that the commands go into a script file and get run on power up? I would rather develop a C code application . But the above suggests I can not. I am confused . Please clarify this.
  • Hi Kosta,

    I think I might be able to give some input on your query.

    To get started I recommend that you setup your K2L EVM to boot ARM/Linux, make sure you have the RFSDK installed on it. That includes updating the Linux device tree as instructed in the RFSDK Installation Guide.

    Once this is done you should try to run one of the out-of-the-box examples provided in the RFSDK, let's for example pick an LTE20 example, in JESD loopback as I would assume you do not have an RF board connected on any of the FMC connectors at this point.

    The way the RFSDK is supposed to be used is that the ARM/Linux based software is driven from the command line and in charge of configuring the IQN2/DFE/JESD blocks.

    The software handling the TX/RX baseband data has to run on the DSPs. The RFSDK comes with a number of demo DSP program (aka Playback programs).

    Loading and running the Playback programs can be done from the ARM/Linux command line using the "playback" command-line utility.

    This same "playback" command line utility can control the DSP playback software: load TX I/Q patterns, capture RX I/Q patterns, stop the DSP playback cleanly.

    Here is a example of how to run a simple test from the command line:

    1. radio reset
    2. radio select 2x2-2xLTE20-SC-JESD3b-SD-jesdlpbk
    3. radio init
    4. playback program
    5. playback start
    6. radio on 18300 800

    Once you have done that the playback software is running, and you can do some visualization in the RFSDK web interface, which is just a simple demo interface.

    To interact with the DSP playback from the command line you should use the "playback" command as follows:

    • playback load 1 1 /usr/share/radio/patterns/rf-verif/LTE20_30p72_txSeqEven.bin
    • playback load 1 2 /usr/share/radio/patterns/rf-verif/LTE20_30p72_txSeqEven.bin 
    • playback capture
    • playback save 1 1 /usr/share/radio/tests/rf-verif/test2rx1.bin
    • playback save 1 2 /usr/share/radio/tests/rf-verif/test2rx2.bin

    The patterns loaded and saved here are 10ms of 16-bit I/Q in binary format.

    Once you have this running and you get the idea the next step is to look at how to create your own DSP software.

    The source-code for the DSP playback is included in RFSDK source package under the directory "RFSDK2_02.00.05.00-src/usr/src/playback/iqn2".

    But this software is intended more as test and demonstration example than an application example/starting point.

    From what you wrote I understand that you have an interest in doing FFTs using the FFTC accelerator. That in the DSP software that you would setup and start it to consume baseband data coming from the JESD/DFE/IQN2 "firehose" :-).

    In order to support your ADCs/DACs you will need to pick a DFE/JESD configuration that matches your ADC/DAC combination.

    In fact you also need to think of the channel bandwith you want your DSP software to have access to, as this also something that varies depending on the DFE configuration you pick. Supported configurations in the RFSDK range from WCDMA, LTE5, LTE10, LTE15, LTE20 to LTE60 (which is a 3x the LTE20 sampling rate).

    Feel free to let me know if you have further questions...

    I hope this helps, Laurent.

  • Thankyou Laurent!

    I can go down this path, but it seems long and complicated and like you said ,the next step would be to create my own DSP software. I feel it may be better for me to get an example such as the iqn2DfeDualModeK2LTestProject from the example projects loaded with mcsdk_3_01_04_07_setupwin32.exe. If I got that working and then edited it for my specific application wouldn't that save time and effort?

    Thanks for the great response!!
  • Hi Kosta,

    The RFSDK's DSP playback is basically based on the code of the project you mention.

    As a first step I would recommend that you use the RFSDK for IQN2/DFE/JESD configuration, and start from the DSP playback code base to create your application, leaving it to the RFSDK to handle startup/operation/shutdown of the IQN2/DFE/JESD combo.

    As a second step you could then try to move the equivalent of the RFSDK IQN2/DFE/JESD startup/operation/shutdown procedures to the DSP if you so wish. That is a bit more work though.

    Now, I would change the recommendation if what you want to do that on your own board and if you want to do IQN2/DFE/JESD validation before you even attempt to bring-up ARM/Linux (i.e. a DSP-only solution first).

    In this case your best bet is probably to start from one of these projects. The tricky part is selecting the right DFE configuration for your ADC/DAC card, and making sure to configure the IQN2 correctly for it. I don't remember seeing the sampling rates and # of TX/RX antenna streams you are targeting in your application...

    The caveat is that the startup/operation/shudown procedures of the RFSDK are much more complete and full-featured (more tunable parameters) than what you will find the DSP code examples. So even if you get something going it might still require some significant work to get it ship-shape for your final application.

    I hope this helps, Laurent.
  • Hello,

    Within the context of ADC and DAC talking to RFSDK.  You have to matchup the design examples to the

    intended ADC and DAC use.

       TI design 4, 32RF80 ADC uses 1 Rx, as two JESD lanes 0 and 1. or 2Rx using all 4 JESD lanes

           this example has 245.76Msps complex, with a serdes rate of 4.9152Msps, L2 M2 F2 (1Rx-2lane), L4 M4 F2 (2Rx-4 lane)

        TI design 4, DAC38J84 uses 1 Tx as two JESD lanes 0 and 1; or 2 Tx using all 4 JESD lanes

           this example has 245.76Msps complex, with a serdes rate of 4.9152Msps, L2 M2 F2 (1Tx-2lane), L4 M4 F2 (2Tx-4 lane)

       TI design 1, 12J4000 ADC uses 1 Rx, as two JESD lanes 0 and 1.

           this example has 245.76Msps complex, with a serdes rate of 4.9152Msps, L2 M2 F2 (1Rx-2lane)

        TI design 1, DAC38J84 uses 1 Tx as two JESD lanes 0 and 1; or 2 Tx using all 4 JESD lanes

           this example has 245.76Msps complex, with a serdes rate of 4.9152Msps, L2 M2 F2 (1Tx-2lane)

     

    In order to use the prebuilt RFSDK examples, you have to fit the dataconverter applications to the parallel IQ, 2 lane, L 2 M 2 F 2 strategy.

    If you want a more customized solution, contacting the third party developers Comm Agility in England, or Azcom in Italy, have prebuilt modules, or

    the ability to modify the reference designs.

    Regards,

    Radio Joe

  • Hello,
    You can run Design 4 in JESD loopback, so no ADC or DAC board is needed, just the 66Ak2L06 EVM.
    www.ti.com/.../TIDEP0081

    On the EVM, request and download MCSDK 3.1.4.7
    request and download RFSDK
    On the 66AK2L06 EVM, you can run the RFSDK in JESDlane Loopback for design 4.

    The DFE functionality is illustrated with the Design 4 example for the Tx path.
    In the Rx path, the Design 4 example has several capabilities, Direct downconversion through Rx ADC, RFSDK usage of DDUC mixer - channel downconversion, and PFIR filter selection for narrow or wider band channel response.
    The Design 4 example can be tried in JESD loopback mode without the ADC or DAC. the RFSDK user guide has specific GUI features over TCPIP or ARM scripts can be written to control from the ARM command terminal 0.

    Within the RFSDK, you select a radio select case. This preprograms the DFE subsystem including JESD, Serdes subsystem, IQN subsystem, and PktDMA subsystem to move DDR3 baseband data through transport to IQN. This interfaces with DFE, the radio signal processing is performed,
    based on the radio select
    Design 4 Tx
    BBIQ 92.16 -> DDUC, CFR subsystem Interp2, CDFR Interp (4/3 or 2), DPD is not used, Tx is in bypass, JESD converts IQ to LMF 222, 245.76 or 368.64parallel IQ
    Design4 Rx
    JESD received data is output, 1stream 245.76, 368.64; 2 stream 122.88, 184.32; Rx stream process, block downconversion - 2 stream 122.88, 184.32, Rx DDUC stream select, tune, filter (selectable BW) decimate to 2 carriers at 92.16Msps

    Regards,
    Joe Quintal
  • Hello,
    The custom ADC and DAC boards, have to have to format of example TI design JESD converters, in order to utilize the design 4 software, or design 1 software. The items that must match are the JESD parameter formats for Lane, number of data converters, and number of bytes per frame F. This is the data converter stream end of the interface. So this sets the Tx and Rx stream rates. At the opposite end we have the Baseband IQ rates, the number of baseband channels, and the DFE clock rate.

    You would look in Design 4 initially for a 1 or 2 stream complex receiver, with a specific RX stream rate. Also there is a single or dual stream Tx side going to the DAC.

    Within the DFE User Guide, we typically have a stream rate after the DDUC of DFEclock/4 for Tx. The CFR block, CDFR block, and Tx block all have interpolation and decimation sections that can help you convert your 1st stage stream processing to the Tx output stream rate.

    The Rx side has both a 1,2,4 stream Rx receiver and a separate Feedback receiver. Typically for 1 or 2 receive streams, the receive stream rate before the DDUC-Rx is DFE clock /2 or DFE clock/4.

    The DDUC provides filtering, interpolation or decimating from the Baseband rate to the 1st stream rate. Using design 4 as an example, we have a DFEclock/4, 2 antenna, there are 2 baseband carriers, one assigned to each stream.

    The DFE development is prebuilt in the radio select, and use case files. There are override functions and scripts for modifying specific settings
    in the gain, NCO mixing, PFIR filter selection, and loading baseband channel data. There are 3rd party developers that can customize some of the parameters for you.

    Regards,
    Joe QUintal
  • Hello,
    The custom ADC and DAC boards, have to have to format of example TI design JESD converters, in order to utilize the design 4 software, or design 1 software. The items that must match are the JESD parameter formats for Lane, number of data converters, and number of bytes per frame F. This is the data converter stream end of the interface. So this sets the Tx and Rx stream rates. At the opposite end we have the Baseband IQ rates, the number of baseband channels, and the DFE clock rate.

    You would look in Design 4 initially for a 1 or 2 stream complex receiver, with a specific RX stream rate. Also there is a single or dual stream Tx side going to the DAC.

    Within the DFE User Guide, we typically have a stream rate after the DDUC of DFEclock/4 for Tx. The CFR block, CDFR block, and Tx block all have interpolation and decimation sections that can help you convert your 1st stage stream processing to the Tx output stream rate.

    The Rx side has both a 1,2,4 stream Rx receiver and a separate Feedback receiver. Typically for 1 or 2 receive streams, the receive stream rate before the DDUC-Rx is DFE clock /2 or DFE clock/4.

    The DDUC provides filtering, interpolation or decimating from the Baseband rate to the 1st stream rate. Using design 4 as an example, we have a DFEclock/4, 2 antenna, there are 2 baseband carriers, one assigned to each stream.

    The DFE development is prebuilt in the radio select, and use case files. There are override functions and scripts for modifying specific settings
    in the gain, NCO mixing, PFIR filter selection, and loading baseband channel data. There are 3rd party developers that can customize some of the parameters for you.

    Regards,
    Joe QUintal